AMD-K6 AMD [Advanced Micro Devices], AMD-K6 Datasheet - Page 208
AMD-K6
Manufacturer Part Number
AMD-K6
Description
AMD-K6 Processor
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AMD-K6.pdf
(346 pages)
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AMD-K6
Figure 71. External Logic for Supporting Floating-Point Exceptions
190
AMD-K6
®
Processor
Processor Data Sheet
IGNNE#
FERR#
®
INTR
instruction. IGNNE# is used by the external hardware to control
the effect of an unmasked floating-point exception. Under
certain circumstances, if IGNNE# is sampled asserted, the
processor ignores the floating-point exception.
Figure 71 illustrates an implementation of external logic for
supporting floating-point exceptions. The following example
explains the operation of the external logic in Figure 71:
See “FERR# (Floating-Point Error)” on page 96 and “IGNNE#
(Ignore Numeric Exception)” on page 100 for more details.
Floating-Point and Multimedia Execution Units
I/O Address
Port F0h
RESET
As the result of a floating-point exception, the processor
asserts FERR#. The assertion of FERR# and the
sampling of IGNNE# negated indicates the processor has
stopped instruction execution and is waiting for an
interrupt. The assertion of FERR# leads to the assertion
of INTR by the interrupt controller. The processor
a ck n o w l e d g e s t h e i n t e r r u p t a n d j u m p s t o t h e
corresponding interrupt service routine in which an I/O
write cycle to address port F0h leads to the assertion of
IGNNE#. When IGNNE# is sampled asserted, the
processor ignores the floating-point exception and
continues instruction execution. When the processor
negates FERR#, the external logic negates IGNNE#.
“1”
Preliminary Information
CLOCK
DATA
CLEAR
CLEAR
CLOCK
Flip-Flop
DATA
IGNNE#
Flip-Flop
FERR#
Q
Q
Q
Q
IRQ13
Controller
Interrupt
20695H/0—March 1998
Chapter 9
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