UJA1061TW PHILIPS [NXP Semiconductors], UJA1061TW Datasheet - Page 10

• Manufacturer Part Number: UJA1061TW
• Description: Low speed CAN/LIN system basis chip
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
Being in Normal mode, Start-up mode will be entered if:
Being in Flash mode, Start-up mode will be entered if:
When entering Start-up mode, the reset source
information is provided by the UJA1061 in order to support
different software initialization cycles that depend on the
reset event.
6.2.3
The intention of the Restart mode is to give the application
a second opportunity to start-up, if the first start-up has
failed due to a certain failure. Restart mode will be entered
out of the start-up as shown in the state diagram (see
Fig.3). The events are as follows:
Entering Restart mode will always lengthen the reset pulse
to the long period in order to guarantee a proper reset
length independent from history.
If one of these failures still occurs after entering this mode;
pin RSTN stays LOW or if the UJA1061 detects an
undervoltage on V1 after an already released pin RSTN,
Fail Safe mode will be entered. If the failure has been
removed during Restart mode and the watchdog
initialization has been successful, the selected operating
mode will be entered. The only correct watchdog
initialization out of Restart mode is the SPI access of the
Mode register, whereby the init Normal mode has been
selected.
2004 Mar 22
A wrong mode register code access occurs
On too-late or too-early watchdog triggering
After an ignored interrupt (same as an ignored interrupt
in Standby mode)
Flash mode entry sequence is written to the mode
register
During a pending wake-up when the microcontroller did
request a mode change to Sleep mode.
A wrong mode register code access occurs
On a watchdog trigger overflow (too late)
After an ignored interrupt (same as an ignored interrupt
in Standby mode).
A watchdog initialization failure occurs (wrong mode
register code or start-up time-out
An SPI failure (SPI count other than 16) occurs
A falling edge on pin RSTN occurs during the
initialization phase in Start-up mode
A falling edge on pin RSTN occurs during start-up.
Low speed CAN/LIN system basis chip
R
ESTART MODE
10
6.2.4
The Normal mode is entered after the following events
(see Fig.3):
In this mode the UJA1061 allows access to all system
resources such as CAN, LIN, INH and EN and therefore
requires accurate watchdog triggering using the Window
mode with programmable windows. Upon any false
watchdog trigger, a system reset is performed.
Interrupts to the host microcontroller initiated by the
UJA1061 are also observed. A system reset is performed
if the host microcontroller does not react within 256 ms.
Entering Normal mode does not activate the CAN physical
layer automatically. A certain bit (CAN mode) is used to
activate the CAN medium if desired, enabling local cyclic
wake-up scenarios to be implemented without affecting
the CAN physical layer.
6.2.5
Standby mode sets the system into a state with reduced
current consumption. Entering Standby mode will
automatically clear the CAN mode bit, thus allowing the
CAN physical layer to enter the Low-power mode
autonomously. However, the watchdog still monitors the
microcontroller (Time-out mode) since it is powered via
pin V1.
In case the host microcontroller can provide a Low-power
mode with reduced current consumption in its standby or
stop mode, the watchdog can be switched-off entirely
within Standby mode of the UJA1061. The UJA1061
monitors the microcontroller supply current to make sure
that there is no unobserved phase with disabled watchdog
and running microcontroller. The watchdog will keep active
until the supply current drops below a certain limit. Below
this current limit the watchdog is disabled. If the current
increases again, e.g. caused by a microcontroller wake-up
from application-specific hardware, the watchdog starts
operation again with the previously-used time-out period.
A system reset can be performed if programmed
accordingly, in this case Start-up mode is entered.
Watchdog initialization has been executed successfully
after an init Normal mode access of the mode register
out of Start-up or Restart mode
Out of Standby mode via an SPI command.
N
S
TANDBY MODE
ORMAL MODE
Objective specification
UJA1061