UJA1061TW PHILIPS [NXP Semiconductors], UJA1061TW Datasheet - Page 23

• Manufacturer Part Number: UJA1061TW
• Description: Low speed CAN/LIN system basis chip
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
6.7.1.1
Within the Active mode the CAN transceiver operates as in
the Normal mode of the TJA1054. Here normal
communication is possible with pin CANL terminated at
the voltage rail V2 (5 V). The Active mode can be entered
only using the CAN mode bit if the system controller is
within its Normal mode or in Flash mode. Transmission
and reception of messages is possible in the Active mode.
If the regulator V2 is not able to start within the V2 clamped
LOW time (>t
during an already activated V2, regulator V2 becomes
disabled (V2D will be reset) and an interrupt is forced to
the microcontroller, if enabled. The corresponding fail flag
will be set at the same time; also the transmitter and
receiver are switched off and any transmission of
messages is blocked by the UJA1061. The termination of
CANH and CANL will be set to floating.
If the microcontroller wants to transmit again, it can
activate the transmitter, the corresponding termination and
the receiver again by a falling edge of the CAN Transmitter
Control (CTC) bit. If this continues to fail (V2 cannot start;
V2D will be reset) an interrupt is forced again (if enabled)
and V2, the transmitter, the receiver and the termination
will be switched off again. This makes sure that a
short-circuited V2 does not result in high power
consumption.
A CAN transmitter OFF bit is available to set the CAN
transceiver to a Listen-only mode. In this mode the
transmitter output stage is disabled.
Within Active mode, a wake-up via CAN will never result in
a reset.
6.7.1.2
The Auto mode is entered if the CAN mode bit is cleared.
From now on no active transmission is possible. The
transmitter will be switched off.
The Auto mode is also entered whenever the system
controller leaves its Normal mode. This clears the CAN
mode bit automatically.
Within Auto mode the physical medium is still supported
(On-line and Selective Sleep mode) including the bus
failure management as long as there is some activity on
the bus lines. CANL continues to be terminated strongly
towards V2 and V2 is active.
2004 Mar 22
Low speed CAN/LIN system basis chip
Active mode
Auto mode
V2(CLT)
) or a short-circuit has been detected
23
Once the bus becomes recessive or dominant for a certain
time (t
timer is programmable in two steps with the CAN Off-line
Timer Control (COTC) bit. Entering Off-line will set the
timer to the longest period independently of the COTC bit
and will be reset with every CAN wake-up event
Three different states are implemented:
6.7.1.3
On-line will be entered after the UJA1061 has detected
some activity on CANL and/or CANH, while the transceiver
was Off-line and the CAN Partial Networking Control
(CPNC) bit was LOW. A CAN message containing a
dominant phase, followed by a recessive phase and
followed again by a dominant phase, results in a wake-up
of the UJA1061, after having passed the CAN wake-up
filter. Pin RXDC is forced LOW upon wake-up towards
On-line and keeps LOW until the CAN mode bit is set
(Active mode) or the CPNC bit is set to logic 1, entering
Selective Sleep. Additionally a reset or interrupt is forced,
if programmed accordingly.
On-line also can be entered by resetting the CAN mode bit,
CM (Auto mode) during Normal mode of the UJA1061 with
the CPNC bit set to LOW. After some bus activity, the
wake-up flip flop will be set again, together with a LOW
signal on RXDC. If the bus stays continuously dominant or
recessive for the Off-line time (t
entered, clearing the wake-up flip flop. Leaving On-line,
the wake-up flip flop will be cleared in order to be ready for
the next wake-up event.
6.7.1.4
Selective Sleep is selectable with the CAN Partial
Networking Control (CPNC) bit. In contrast with On-line, in
Selective Sleep any wake-up, with the exception of the
Global Wake-up CAN message, due to CAN-bus activity is
ignored but the physical medium, including bus failure
management and strong termination, continues to be
supported in order to support partial networking. In this
mode, RXDC stays continuously at V1 level.
On-line
Selective Sleep
Off-line.
offline
) the transceiver goes to Off-line. The Off-line
On-line
Selective Sleep
offline
Objective specification
), Off-line will be
UJA1061