UJA1061TW PHILIPS [NXP Semiconductors], UJA1061TW Datasheet - Page 26

• Manufacturer Part Number: UJA1061TW
• Description: Low speed CAN/LIN system basis chip
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
6.8
The integrated LIN transceiver of the UJA1061 has the
following features:
The master and slave termination can be connected
externally between pins LIN and RTLIN.
6.8.1
The first state of the LIN transceiver following power-on is
Off-line (see Fig.10). The transmitter and receiver both
consume no current but wake-up events will be recognised
by the separate wake-up receiver.
Pin RXDL reflects the status of the wake-up flip flop: HIGH
after power-on; LOW after a wake-up event via the
LIN-bus.
Any LIN event with a dominant LIN level longer than the
specified wake-up time (t
level will wake-up the UJA1061, resulting in a LOW signal
at pin RXDL and, if enabled, a LOW signal at pin RSTN or
at pin INTN. When the UJA1061 enters Normal or Flash
mode, the LIN transceiver automatically enters On-line
and the wake-up flip flop will be cleared. The wake-up flip
flop will be cleared also when the UJA1061 falls into
Fail-safe mode as the result of a microcontroller wake-up
failure. A remote LIN wake-up out of Standby or Flash
mode will wake-up the system via a dedicated hardware
reset or via an interrupt, depending on the LIN Interrupt
Enable (LINIE) bit. With bit LINIE set to logic 1, pin INTN
remains LOW until the interrupt register has been read and
cleared.
A remote LIN wake-up out of Sleep or Fail-safe mode
always happens with a reset independent of the
programming due to the unpowered situation of the
2004 Mar 22
LIN specification revision 2.0 compatible
42 V system handling compatibility
Disabling of the termination switch during a short-circuit
from LIN to GND
No reverse currents are possible from RTLIN to the
battery
Supports two different LIN-recessive levels; related to
BAT42 or to BAT14.
Low speed CAN/LIN system basis chip
LIN transceiver
M
ODE CONTROL
BUS(LIN)
) followed by a recessive
26
microcontroller. The differences between On-line and
Off-line are as follows:
Bit L42 determines whether the pin RTLIN is supplied by
the BAT14 voltage source or by an internal 12 V supply
generated from the BAT42 regulator, in order to support
the future 42 V LIN standard. Pin RTLIN has to be applied
via a buffer capacitor in case bit L42 is set. Default
operating mode is BAT14 related. During On-line, with no
short-circuit between the LIN bus and GND, pin RTLIN
provides an internal switch to select BAT14 or the internal
12 V voltage, depending on the L42 bit. For master and
slave operation an external resistor, respectively 1 k or
30 k , can be applied between pins RTLIN and LIN.
An external diode in series with the termination resistor is
not needed because an internal diode is incorporated.
If the LIN wire becomes short-circuited to GND, pin RTLIN
will switch to a current source of approximately 75 A to
prevent significant battery discharge (some current is
needed for failure recovery). A recessive level on the LIN
wire activates the normal termination again. The 75 A
current source is also present in Off-line with no clamped
dominant LIN-bus. Pin RTLIN floats in Off-line in case
there is a short-circuit to GND.
Entering Active mode out of Off-line always results in
switching on the strong switch at pin RTLIN, independent
of a previously detected short-circuit on LIN to ground.
If the short-circuit still exists, the switch will be substituted
by the 75 A current source after the dominant time-out at
pin LIN. The different states of pin RTLIN are shown in
Fig.11.
The receiver comparator levels are battery related to
BAT14 in a 14 V system with the L42 bit cleared, and
related to the internal 12 V voltage supply in 42 V systems
with the L42 bit set.
Off-line. The transmitter is always off and pin RXDL
continuously reflects the wake-up event at the LIN-bus
On-line. The status of the transmitter is software
controlled by the microcontroller via the LIN Transmitter
Control bit (LTC) while pin RXDL reflects the data bit
stream on the LIN-bus
Objective specification
UJA1061