UJA1061TW PHILIPS [NXP Semiconductors], UJA1061TW Datasheet - Page 15

• Manufacturer Part Number: UJA1061TW
• Description: Low speed CAN/LIN system basis chip
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
6.4.2
Whenever the UJA1061 has entered Normal mode as a
result of a successful watchdog initialization, the Window
mode of the watchdog has been activated. This makes
sure that the microcontroller operates within the desired
speed. Too fast as well as too slow operation will be
detected. See Fig.5 for watchdog triggering using the
Window mode.
The UJA1061 provides ten different period timings in this
mode (with an accuracy of 10 %).
The watchdog window has been defined to be between
50 and 100 % of the nominal programmed watchdog
period.
2004 Mar 22
handbook, full pagewidth
Low speed CAN/LIN system basis chip
W
ATCHDOG WINDOW BEHAVIOUR
trigger
via SPI
trigger point
last
Fig.5 Watchdog triggering using Window mode.
trigger
restarts
period
too early
(with different duration if
trigger restarts period
earliest possible
trigger point
period
50 %
15
desired)
trigger
via SPI
trigger window
The period can be changed on the fly with any valid SPI
mode register access. Whenever the watchdog is
triggered within the window time, the timer is reset in order
to start a new period.
Any too early or too late watchdog access or wrong mode
register code access results in an immediate system reset,
entering Start-up mode.
In the background, any enabled interrupt event will be
monitored by the watchdog. If the microcontroller does not
react upon receipt of an interrupt within the interrupt
response time (265 ms), a system reset will be performed.
too early
latest possible
trigger point
100 %
new period
possible
earliest
trigger
50 %
point
window
trigger
possible
trigger
latest
100 %
point
MCE626
Objective specification
UJA1061