UJA1061TW PHILIPS [NXP Semiconductors], UJA1061TW Datasheet - Page 72

• Manufacturer Part Number: UJA1061TW
• Description: Low speed CAN/LIN system basis chip
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
2004 Mar 22
Battery monitoring
t
t
Power supply V1 (pin V1)
t
t
Power supply V2 (pin V2)
t
Power supply V3 (pin V3)
t
t
Wake-up input (pin WAKE)
t
t
Watchdog
t
t
t
Reset output (pin RSTN)
t
t
t
t
BAT42(L)
SENSE(L)
V1(CLT)
V1MODE
2(CLT)
W(CS)
on(CS)
WU
su(CS)
WD(ETP)
WD(LTP)
WD(init)
RSTN(ext)
RSTN(CHT)
RSTN(INT)
RSTNL
Low speed CAN/LIN system basis chip
SYMBOL
BAT42 LOW time for
setting Power-on reset
flag
BAT42 LOW time for
setting BAT fail flag
V1 clamped LOW time
during ramp-up of V1
LOW or HIGH time to
change from V1 = 3 V to
V1 = 5 V and back
V2 clamped LOW time
during ramp-up V2
cyclic sense period
cyclic sense on-time
input port filter time
cyclic sense sample
set-up time
earliest trigger point
latest trigger point
watchdog init period
external reset monitoring
time
clamped HIGH time,
pin RSTN
interrupt monitoring time
reset lengthening time
PARAMETER
Start-up mode; V1 active
V1 active
V2 active
V3C = 10; see Fig.12
V3C = 11; see Fig.12
V3C = 10; see Fig.12
V3C = 11; see Fig.12
V
V
V3C = 11 or 10; see Fig.12
programmed Nominal Watchdog
Period (NWP); Normal mode
programmed Nominal Watchdog
Period (NWP); Normal mode,
Standby and Sleep mode
watchdog time-out in Start-up mode
RSTN driven LOW internally but
RSTN pin remains HIGH
INTN = logic 0
after internal or external reset has
been released; RST = logic 0
after internal or external reset has
been released; RST = logic 1
BAT42
BAT42
= 5 to 27 V
= 27 to 52 V
CONDITIONS
72
5
5
229
5
28
180
360
14
28
10
50
310
0.45
NWP
0.9
NWP
229
229
115
229
0.9
18
MIN.
TYP.
Objective specification
UJA1061
20
20
283
20
36
220
440
18
36
120
250
390
0.55
NWP
1.1
NWP
283
283
141
283
1.1
22
MAX.
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
UNIT
s
s
s
s
s
s
s
s