UJA1061TW PHILIPS [NXP Semiconductors], UJA1061TW Datasheet - Page 45

• Manufacturer Part Number: UJA1061TW
• Description: Low speed CAN/LIN system basis chip
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
6.14.9
This register allows the settings within the Configuration register to be read back.
Table 10 SCF - System Configuration Feedback register (address 10) bit description
2004 Mar 22
Low speed CAN/LIN system basis chip
15, 14
7, 6
BIT
13
12
11
10
9
8
5
4
3
2
1
0
S
YSTEM
SYMBOL
V1RTHC V1 Reset Threshold
GSTHC
V1CMC
A1, A0
WEN
WSC
RRS
RLC
V3C
RO
IC
C
ONFIGURATION
register address
Read Register Select
Read Only
reserved
reserved
GND Shift Threshold
Control
Reset Length Control
V3 Control
Control
V1 Current Monitor
Control
WAKE Enable
WAKE Sample
Control
reserved
INH control
DESCRIPTION
F
EEDBACK REGISTER
VALUE
10
11
10
01
00
0
1
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
0
45
read System Configuration Feedback register (SCF)
read the System Configuration Feedback register without
writing to the System Configuration register
read the System Configuration Feedback register and write
to the System Configuration register (previous content
reflected)
reserved for future use; should always be set to logic 0 in
order to secure compatibility with future functions which will
be activated by a logic 1
reserved for future use; should always be set to logic 0 in
order to secure compatibility with future functions which will
be activated by a logic 1
20 ms system reset is selected; default after power-up
1 ms system reset is selected
Cyclic mode 2; 350 s ON/32 ms period
Cyclic mode 1; 350 s ON/16 ms period
continuously ON
OFF
the reduced V1 undervoltage threshold is selected
the normal V1 undervoltage threshold is selected
an increasing V1 current causes a reset event if the
watchdog was disabled
an increasing V1 current just activates the watchdog again
wake-up functionality at WAKE pin enabled
wake-up functionality at WAKE pin disabled
WAKE mode cyclic sample
WAKE mode continuous sample
reserved for future use; should always be set to logic 0 in
order to secure compatibility with future functions which will
be activated by a logic 1
INH pin HIGH
INH pin floating
1.5 V; exceeding this level may force an interrupt
0.75 V; exceeding this level may force an interrupt
FUNCTION
Objective specification
UJA1061