MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 120

• Manufacturer Part Number: MC68HC908AP16CFA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Clock Generator Module (CGM)
Data Sheet
120
Address:
AUTO — Automatic Bandwidth Control Bit
LOCK — Lock Indicator Bit
ACQ — Acquisition Mode Bit
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
This read/write bit selects automatic or manual bandwidth control.
When initializing the PLL for manual operation (AUTO = 0), clear the
ACQ bit before turning on the PLL. Reset clears the AUTO bit.
When the AUTO bit is set, LOCK is a read-only bit that becomes set
when the VCO clock, CGMVCLK, is locked (running at the
programmed frequency). When the AUTO bit is clear, LOCK reads as
logic 0 and has no meaning. The write one function of this bit is
reserved for test, so this bit must always be written a 0. Reset clears
the LOCK bit.
When the AUTO bit is set, ACQ is a read-only bit that indicates
whether the PLL is in acquisition mode or tracking mode. When the
AUTO bit is clear, ACQ is a read/write bit that controls whether the
PLL is in acquisition or tracking mode.
In automatic bandwidth control mode (AUTO = 1), the last-written
value from manual operation is stored in a temporary location and is
recovered when manual operation resumes. Reset clears this bit,
enabling acquisition mode.
For More Information On This Product,
1 = Automatic bandwidth control
0 = Manual bandwidth control
1 = VCO frequency correct or locked
0 = VCO frequency incorrect or unlocked
1 = Tracking mode
0 = Acquisition mode
Figure 8-5. PLL Bandwidth Control Register (PBWCR)
$0037
AUTO
Bit 7
0
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= Unimplemented
LOCK
6
0
ACQ
5
0
4
0
0
R
MC68HC908AP Family — Rev. 2.5
3
0
0
= Reserved
2
0
0
1
0
0
MOTOROLA
Bit 0
R