MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 372

• Manufacturer Part Number: MC68HC908AP16CFA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Input/Output (I/O) Ports
Data Sheet
372
NOTE:
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Figure 18-8
When DDRBx is a logic 1, reading address $0001 reads the PTBx data
latch. When DDRBx is a logic 0, reading address $0001 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
Table 18-3
Notes:
DDRB
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect input.
Freescale Semiconductor, Inc.
Bit
0
1
For More Information On This Product,
READ DDRB ($0005)
WRITE DDRB ($0005)
WRITE PTB ($0001)
READ PTB ($0001)
PTB
X
Bit
summarizes the operation of the port B pins.
X
(1)
Go to: www.freescale.com
shows the port B I/O logic.
I/O Pin Mode
Table 18-3. Port B Pin Functions
Input, Hi-Z
Figure 18-8. Port B I/O Circuit
RESET
Output
(2)
Accesses to DDRB
DDRBx
PTBx
Read/Write
DDRB[7:0]
DDRB[7:0]
# PTB3–PTB0 are open-drain pins when configured as outputs.
PTB7–PTB4 have schmitt trigger inputs.
MC68HC908AP Family — Rev. 2.5
PTB[7:0]
Read
Accesses to PTB
Pin
MOTOROLA
PTB[7:0]
PTB[7:0]
Write
PTBx
(3)
#