MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 399
MC68HC908AP16CFA
Manufacturer Part Number
MC68HC908AP16CFA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AP16CFA.pdf
(440 pages)
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21.5 Interrupts
21.6 Monitor Mode
21.7 Low-Power Modes
21.7.1 Wait Mode
21.7.2 Stop Mode
MC68HC908AP Family — Rev. 2.5
MOTOROLA
The COP does not generate CPU interrupt requests.
When monitor mode is entered with V
disabled as long as V
monitor mode is entered by having blank reset vectors and not having
V
occurs.
The WAIT and STOP instructions put the MCU in low power-
consumption standby modes.
The COP remains active during wait mode. To prevent a COP reset
during wait mode, periodically clear the COP counter in a CPU interrupt
routine.
Stop mode turns off the ICLK input to the COP and clears the COP
prescaler. Service the COP immediately before entering or after exiting
stop mode to ensure a full COP timeout period after entering or exiting
stop mode.
To prevent inadvertently turning off the COP with a STOP instruction, a
configuration option is available that disables the STOP instruction.
When the STOP bit in the configuration register has the STOP
instruction is disabled, execution of a STOP instruction results in an
illegal opcode reset.
TST
Freescale Semiconductor, Inc.
For More Information On This Product,
on the IRQ1 pin, the COP is automatically disabled until a POR
Go to: www.freescale.com
TST
remains on the IRQ1 pin or the RST pin. When
TST
Computer Operating Properly (COP)
on the IRQ1 pin, the COP is
Data Sheet
Interrupts
399
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