MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 221

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MC68HC908AP16CFA

Manufacturer Part Number
MC68HC908AP16CFA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
13.4.3 Receiver
13.4.3.1 Character Length
13.4.3.2 Character Reception
MC68HC908AP Family — Rev. 2.5
MOTOROLA
Figure 13-5
The receiver can accommodate either 8-bit or 9-bit data. The state of the
M bit in SCI control register 1 (SCC1) determines character length.
When receiving 9-bit data, bit R8 in SCI control register 2 (SCC2) is the
ninth bit (bit 8). When receiving 8-bit data, bit R8 is a copy of the eighth
bit (bit 7).
During an SCI reception, the receive shift register shifts characters in
from the RxD pin. The SCI data register (SCDR) is the read-only buffer
between the internal data bus and the receive shift register.
After a complete character shifts into the receive shift register, the data
portion of the character transfers to the SCDR. The SCI receiver full bit,
SCRF, in SCI status register 1 (SCS1) becomes set, indicating that the
received byte can be read. If the SCI receive interrupt enable bit, SCRIE,
in SCC2 is also set, the SCRF bit generates a receiver CPU interrupt
request.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
shows the structure of the SCI receiver.
Serial Communications Interface Module (SCI)
Functional Description
Data Sheet
221

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