MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 67
MC68HC908AP16CFA
Manufacturer Part Number
MC68HC908AP16CFA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AP16CFA.pdf
(440 pages)
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5.3 Configuration Register 1 (CONFIG1)
MC68HC908AP Family — Rev. 2.5
MOTOROLA
NOTE:
Address:
The mask option register (MOR) is used for selecting one of the three
clock options for the MCU. The MOR is a byte located in FLASH
memory, and is written to by a FLASH programming routine.
COPRS — COP Rate Select Bit
LVISTOP — LVI Enable in Stop Mode Bit
If LVISTOP=0, set LVIRSTD=1 before entering stop mode.
LVIRSTD — LVI Reset Disable Bit
Reset:
Read:
Write:
COPRS selects the COP time out period. Reset clears COPRS. (See
Section 21. Computer Operating Properly
When the LVIPWRD or LVIREGD bit is clear, setting the LVISTOP bit
enables the LVI to operate during stop mode. Reset clears LVISTOP.
(See
LVIRSTD disables the reset signal from the LVI module. (See
Section 22. Low-Voltage Inhibit
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = COP time out period = 2
0 = COP time out period = 2
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
1 = LVI module resets disabled
0 = LVI module resets enabled
COPRS
$001F
Section 22. Low-Voltage Inhibit
Bit 7
Figure 5-2. Configuration Register 1 (CONFIG1)
0
Go to: www.freescale.com
LVISTOP LVIRSTD LVIPWRD LVIREGD
6
0
Configuration & Mask Option Registers (CONFIG & MOR)
5
0
13
18
4
0
– 2
– 2
(LVI).)
4
4
Configuration Register 1 (CONFIG1)
ICLK cycles
ICLK cycles
(LVI).)
3
0
(COP).)
SSREC
2
0
STOP
1
0
Data Sheet
COPD
Bit 0
0
67
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