MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 137

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MC68HC908AP16CFA

Manufacturer Part Number
MC68HC908AP16CFA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
9.3.2.3 Illegal Opcode Reset
9.3.2.4 Illegal Address Reset
9.3.2.5 Low-Voltage Inhibit (LVI) Reset
9.3.2.6 Monitor Mode Entry Module Reset
MC68HC908AP Family — Rev. 2.5
MOTOROLA
The SIM decodes signals from the CPU to detect illegal instructions. An
illegal instruction sets the ILOP bit in the SIM reset status register
(SRSR) and causes a reset.
If the stop enable bit, STOP, in the mask option register is logic 0, the
SIM treats the STOP instruction as an illegal opcode and causes an
illegal opcode reset. The SIM actively pulls down the RST pin for all
internal reset sources.
An opcode fetch from an unmapped address generates an illegal
address reset. The SIM verifies that the CPU is fetching an opcode prior
to asserting the ILAD bit in the SIM reset status register (SRSR) and
resetting the MCU. A data fetch from an unmapped address does not
generate a reset. The SIM actively pulls down the RST pin for all internal
reset sources.
The low-voltage inhibit module (LVI) asserts its output to the SIM when
the V
status register (SRSR) is set, and the external reset pin (RST) is held low
while the SIM counter counts out 4096 + 32 ICLK cycles. Thirty-two ICLK
cycles later, the CPU is released from reset to allow the reset vector
sequence to occur. The SIM actively pulls down the RST pin for all
internal reset sources.
The monitor mode entry module reset asserts its output to the SIM when
monitor mode is entered in the condition where the reset vectors are
blank ($FF). (See
gets asserted, an internal reset occurs. The SIM actively pulls down the
RST pin for all internal reset sources.
Freescale Semiconductor, Inc.
For More Information On This Product,
DD
voltage falls to the LVI
Go to: www.freescale.com
Section 10. Monitor ROM
TRIPF
voltage. The LVI bit in the SIM reset
System Integration Module (SIM)
Reset and System Initialization
(MON).) When MODRST
Data Sheet
137

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