MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 328
MC68HC908AP16CFA
Manufacturer Part Number
MC68HC908AP16CFA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AP16CFA.pdf
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Multi-Master IIC Interface (MMIIC)
16.6.2
Data Sheet
328
MMIIC
Control Register 1 (MMCR1)
Address:
MMEN — MMIIC Enable
MMIEN — MMIIC Interrupt Enable
MMCLRBB — MMIIC Clear Busy Flag
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
This bit is set to enable the Multi-master IIC module. When
MMEN = 0, module is disabled and all flags will restore to its power-
on default states. Reset clears this bit.
When this bit is set, the MMTXIF, MMRXIF, MMALIF, and MMNAKIF
flags are enabled to generate an interrupt request to the CPU. When
MMIEN is cleared, the these flags are prevented from generating an
interrupt request. Reset clears this bit.
Writing a logic 1 to this write-only bit clears the MMBB flag.
MMCLRBB always reads as a logic 0. Reset clears this bit.
For More Information On This Product,
1 = MMIIC module enabled
0 = MMIIC module disabled
1 = MMTXIF, MMRXIF, MMALIF, and/or MMNAKIF bit set will
0 = MMTXIF, MMRXIF, MMALIF, and/or MMNAKIF bit set will not
1 = Clear MMBB flag
0 = No affect on MMBB flag
MMEN
$0049
Bit 7
Figure 16-5. MMIIC Control Register 1 (MMCR1)
generate interrupt request to CPU
generate interrupt request to CPU
0
Go to: www.freescale.com
= Unimplemented
MMIEN
6
0
MMCLRBB
5
0
0
4
0
0
MMTXAK REPSEN
MC68HC908AP Family — Rev. 2.5
3
0
2
0
MMCRCBYTE
1
0
MOTOROLA
Bit 0
0
0
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