MC68HC908AP16CFA MOTOROLA [Motorola, Inc], MC68HC908AP16CFA Datasheet - Page 62

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MC68HC908AP16CFA

Manufacturer Part Number
MC68HC908AP16CFA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
FLASH Memory
4.7 FLASH Protection
4.7.1 FLASH Block Protect Register
Data Sheet
62
NOTE:
Address:
Due to the ability of the on-board charge pump to erase and program the
FLASH memory in the target application, provision is made to protect
pages of memory from unintentional erase or program operations due to
system malfunction. This protection is done by use of a FLASH block
protect register (FLBPR). The FLBPR determines the range of the
FLASH memory which is to be protected. The range of the protected
area starts from a location defined by FLBPR and ends to the bottom of
the FLASH memory ($FFFF). When the memory is protected, the HVEN
bit cannot be set in either erase or program operations.
The mask option register ($FFCF) and the 48 bytes of user interrupt
vectors ($FFD0–$FFFF) are always protected, regardless of the value in
the FLASH block protect register. A mass erase is required to erase
these locations.
The FLASH block protect register is implemented as an 8-bit I/O register.
The value in this register determines the starting address of the
protected range within the FLASH memory.
BPR[7:0] — FLASH Block Protect Bits
Reset:
Read:
Write:
Start address of FLASH block protect
Freescale Semiconductor, Inc.
BPR[7:1] represent bits [15:9] of a 16-bit memory address. Bits [8:0]
are logic 0’s.
For More Information On This Product,
Figure 4-4. FLASH Block Protect Register (FLBPR)
$FE09
BPR7
Bit 7
0
Go to: www.freescale.com
BPR6
6
0
BPR5
5
0
BPR4
4
0
BPR[7:1]
BPR3
MC68HC908AP Family — Rev. 2.5
3
0
16-bit memory address
BPR2
2
0
0 0 0 0 0 0 0 0 0
BPR1
1
0
MOTOROLA
BPR0
Bit 0
0

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