HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 112

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HD6413008F

Manufacturer Part Number
HD6413008F
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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4. Exception Handling
4.2
4.2.1
A reset is the highest-priority exception. When the RES pin goes low, all processing halts and the
chip enters the reset state. A reset initializes the internal state of the CPU and the registers of the
on-chip supporting modules. Reset exception handling begins when the RES pin changes from
low to high.
The chip can also be reset by overflow of the watchdog timer. For details see section 11,
Watchdog Timer.
4.2.2
The chip enters the reset state when the RES pin goes low.
To ensure that the chip is reset, hold the RES pin low for at least 20 ms at power-up. To reset the
chip during operation, hold the RES pin low for at least 10 system clock (φ) cycles. In the versions
with on-chip flash memory, the RES pin must be held low for at least 20 system clock cycles. See
appendix D.2, Pin States at Reset, for the states of the pins in the reset state.
When the RES pin goes high after being held low for the necessary time, the chip starts reset
exception handling as follows.
• The internal state of the CPU and the registers of the on-chip supporting modules are
• The contents of the reset vector address (H'0000 to H'0003 in advanced mode, H'0000 to
Figure 4.2 shows the reset sequence in modes 1 and 3. Figure 4.3 shows the reset sequence in
modes 2 and 4.
Rev.4.00 Aug. 20, 2007 Page 68 of 638
REJ09B0395-0400
initialized, and the I bit is set to 1 in CCR.
H'0001 in normal mode) are read, and program execution starts from the address indicated in
the vector address.
Reset
Overview
Reset Sequence

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