HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 614

• Manufacturer Part Number: HD6413008F
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Appendix B Internal I/O Registers
8TCSR1—Timer Control/Status Register 1
Rev.4.00 Aug. 20, 2007 Page 570 of 638
REJ09B0395-0400
Note: * Only 0 can be written to bits 7 to 5 to clear these flags.
Initial value
Read/Write
Bit
Compare match/input capture flag B
0
1
R/(W)*
CMFB
[Clearing condition]
Read CMFB when CMFB = 1, then write 0 in CMFB.
[Setting conditions]
• 8TCNT = TCORB
• The 8TCNT value is transferred to TCORB by an input capture signal when
7
0
TCORB functions as an input capture register.
Compare match flag A
0
1
R/(W)*
CMFA
[Clearing condition]
Read CMFA when CMFA = 1, then write 0 in CMFA.
[Setting condition]
8TCNT = TCORA
6
0
Timer overflow flag
0
1
R/(W)*
OVF
[Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF.
[Setting condition]
8TCNT overflows from H'FF to H'00.
5
0
Input capture enable
0
1
R/W
ICE
TCORB is a compare match register
TCORB is an input capture register
4
0
Output/input capture edge select B3 and B2
8TCSR1
ICE in
OIS3
R/W
0
1
3
0
Bit 3
OIS3
0
1
0
1
Bit 1
OS1
Output select A1 and A0
H'FFF83
OIS2
R/W
0
1
2
0
Bit 2
OIS2
Bit 0
OS0
0
1
0
1
0
1
0
1
0
1
0
1
No change at compare match B
0 output at compare match B
1 output at compare match B
Output toggles at compare match
B
TCORB input capture on rising
edge
TCORB input capture on falling
edge
TCORB input capture on both
rising and falling edges
No change at compare match A
0 output at compare match A
1 output at compare match A
Output toggles at compare
match A
OS1
R/W
1
0
Description
Description
OS0
R/W
0
0
8-bit timer channel 1