HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 84

• Manufacturer Part Number: HD6413008F
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
• Manufacturer: RENESAS [Renesas Technology Corp]

2. CPU
Before Execution of BCLR Instruction
Input/output
DDR
Execution of BCLR Instruction
BCLR #0, @P4DDR ; Execute BCLR instruction on DDR
After Execution of BCLR Instruction
Input/output
DDR
Explanation: To execute the BCLR instruction, the CPU begins by reading P4DDR. Since
P4DDR is a write-only register, it is read as H'FF, even though its true value is H'3F.
Next the CPU clears bit 0 of the read data, changing the value to H'FE.
Finally, the CPU writes this value (H'FE) back to P4DDR to complete the BCLR instruction.
As a result, P4
are set to 1, making P4
The BCLR instruction can be used to clear flags in the on-chip registers to 0. In the case of the
IRQ status register (ISR), for example, a flag must be read as a condition for clearing it, but when
using the BCLR instruction, if it is known that a flag has been set to 1 in an interrupt-handling
routine, for instance, it is not necessary to read the flag ahead of time.
Rev.4.00 Aug. 20, 2007 Page 40 of 638
REJ09B0395-0400
0
DDR is cleared to 0, making P4
P4
Input
0
P4
Output
1
7
7
7
and P4
P4
Input
0
P4
Output
1
6
6
6
output pins.
P4
Output
1
P4
Output
1
5
5
P4
Output
1
P4
Output
1
0
an input pin. In addition, P4
4
4
P4
Output
1
P4
Output
1
3
3
P4
Output
1
P4
Output
1
2
2
7
P4
Output
1
P4
Output
1
DDR and P4
1
1
P4
Output
1
P4
Input
0
6
0
0
DDR