HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 14

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HD6413008F

Manufacturer Part Number
HD6413008F
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Rev.4.00 Aug. 20, 2007 page xiv of xliv
REJ09B0395-0400
Item
12.3.2 Operation in
Asynchronous Mode
Figure 12.4 Sample
Flowchart for SCI
Initialization
13.3.5 Clock
Table 13.5 Bit Rates
(bits/s) for Various BRR
Settings (When n = 0)
Table 13.6 BRR
Settings for Typical Bit
Rates (bits/s) (When n =
0)
18.4.3 Selection of
Waiting Time for Exit
from Software Standby
Mode
Table 18.3 Clock
Frequency and Waiting
Time for Clock to Settle
19.2 DC
Characteristics
Table 19.2 DC
Characteristics (2)
Page
356
396
397
466
476
Revision (See Manual for Details)
Figure amended and note added
(4) Wait for at least the interval required to transmit or receive
Note: * In simultaneous transmitting and receiving, the TE and
Table amended
Table amended
Table amended
DIV1 DIV0 STS2 STS1 STS0 Waiting Time 6 MHz
0
Table amended
one bit, then set the TE or RE bit to 1 in SCR*. Set the RIE,
TIE, TEIE, and MPIE bits as necessary. Setting the TE or
RE bit enables the SCI to use the TxD or RxD pin.
1
Item
Current
dissipation*
Analog power
supply current
0
0
0
0
1
1
1
1
RE bits should be cleared to 0 or set to 1
simultaneously.
0
0
1
1
0
0
1
1
N
0
1
2
9600
2
bit/s
Standby mode
During A/D
conversion
During A/D
and D/A
conversion
Idle
0
1
0
1
0
1
0
1
18.00
12096.8 13440.9 16801.1
8064.5
24193.5 26881.7 33602.2
8192 states
16384 states 5.5
32768 states 10.9*
65536 states 21.8
131072 states 43.7
262144 states 87.4
1024 states
2 15.99
N Error
18.00
φ φ (MHz)
Symbol
I
AI
20.00
8960.6
CC
*
CC
2 6.66
N Error
φ φ (MHz)
3
20.00
2.7
0.34
Min
25.00
11200.7
3 12.49
N Error
25.00
4 MHz 2 MHz 1MHz
4.1
8.2*
16.4
32.8
65.5
131.1
0.51
Illegal setting
Typ
1.0
0.6
0.6
0.01
8.2*
16.4
32.8
65.5
131.1
262.1
1.0
Max
10
1.5
1.5
5.0
80
16.4*
32.8
65.5
131.1
262.1
524.3
2.0
Unit
ms

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