HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 244
HD6413008F
Manufacturer Part Number
HD6413008F
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6413008F.pdf
(686 pages)
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8. 16-Bit Timer
Bits 6 and 5—Counter Clear 1 and 0 (CCLR1, CCLR0): These bits select how 16TCNT is
cleared.
Bit 6
CCLR1
0
1
Notes: 1. 16TCNT is cleared by compare match when the general register functions as an output
Bits 4 and 3—Clock Edge 1 and 0 (CKEG1, CKEG0): These bits select external clock input
edges when an external clock source is used.
Bit 4
CKEG1
0
1
When channel 2 is set to phase counting mode, bits CKEG1 and CKEG0 in 16TCR2 are ignored.
Phase counting takes precedence.
Rev.4.00 Aug. 20, 2007 Page 200 of 638
REJ09B0395-0400
2. Selected in TSNC.
Bit 5
CCLR0
0
1
0
1
Bit 3
CKEG0
0
1
⎯
compare register, and by input capture when the general register functions as an input
capture register.
Description
16TCNT is not cleared
16TCNT is cleared by GRA compare match or input capture*
16TCNT is cleared by GRB compare match or input capture*
Synchronous clear: 16TCNT is cleared in synchronization with other
synchronized timers*
Description
Count rising edges
Count falling edges
Count both edges
2
1
1
(Initial value)
(Initial value)
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