HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 618

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HD6413008F

Manufacturer Part Number
HD6413008F
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Appendix B Internal I/O Registers
8TCR2—Timer Control Register 2
8TCR3—Timer Control Register 3
Rev.4.00 Aug. 20, 2007 Page 574 of 638
REJ09B0395-0400
Initial value
Read/Write
Bit
CMIEB
Compare match interrupt enable B
R/W
0
1
7
0
CMIB interrupt requested by CMFB is disabled
CMIB interrupt requested by CMFB is enabled
CMIEA
Compare match interrupt enable A
R/W
0
1
6
0
CMIA interrupt requested by CMFA is disabled
CMIA interrupt requested by CMFA is enabled
Timer overflow interrupt enable
OVIE
R/W
0
1
5
0
OVI interrupt requested by OVF is disabled
OVI interrupt requested by OVF is enabled
Counter clear 1 and 0
CCLR1
0
1
R/W
4
0
0
1
0
1
Clock select 2 to 0
Note: * If the clock input of channel 2 is the 8TCNT3 overflow
CSK2 CSK1 CSK0
CCLR0
Clearing is disabled
Cleared by compare match A
Cleared by compare match B/input capture B
Cleared by input capture B
0
1
R/W
3
0
signal and that of channel 3 is the 8TCNT2 compare
match signal, no incrementing clock is generated. Do
not use this setting.
0
1
0
1
CKS2
R/W
2
0
H'FFF90
H'FFF91
0
1
0
1
0
1
0
1
Internal clock: counted on rising edge
of φ/8
Internal clock: counted on rising edge
of φ/64
Internal clock: counted on rising edge
of φ/8192
Channel 2:
Channel 3:
External clock: counted on falling edge
External clock: counted on rising edge
External clock: counted on both
rising and falling edges
Clock input is disabled
CKS1
Count on 8TCNT3 overflow signal*
Count on 8TCNT2 compare match A*
R/W
1
0
Description
CKS0
R/W
0
0
8-bit timer channel 2
8-bit timer channel 3

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