HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 612
HD6413008F
Manufacturer Part Number
HD6413008F
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6413008F.pdf
(686 pages)
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Appendix B Internal I/O Registers
8TCR0—Timer Control Register 0
8TCR1—Timer Control Register 1
Rev.4.00 Aug. 20, 2007 Page 568 of 638
REJ09B0395-0400
Initial value
Read/Write
Bit
CMIEB
Compare match interrupt enable B
R/W
0
1
7
0
CMIB interrupt requested by CMFB is disabled
CMIB interrupt requested by CMFB is enabled
CMIEA
Compare match interrupt enable A
R/W
0
1
6
0
CMIA interrupt requested by CMFA is disabled
CMIA interrupt requested by CMFA is enabled
Timer overflow interrupt enable
OVIE
R/W
0
1
5
0
OVI interrupt requested by OVF is disabled
OVI interrupt requested by OVF is enabled
Counter clear 1 and 0
CCLR1
0
1
R/W
4
0
0
1
0
1
CCLR0
Note: * If the clock input of channel 0 is the 8TCNT1
R/W
Clock select 2 to 0
Clearing is disabled
Cleared by compare match A
Cleared by compare match B/input capture B
Cleared by input capture B
3
0
0
1
0
1
0
1
overflow signal and that of channel 1 is the
8TCNT0 compare match signal, no
incrementing clock is generated. Do not use
this setting.
CKS2
R/W
H'FFF80
H'FFF81
2
0
0
1
0
1
0
1
0
1
Internal clock: counted on rising
edge of φ/8
Internal clock: counted on rising
edge of φ/64
Internal clock: counted on rising
edge of φ/8192
Channel 0:
Channel 1:
External clock: counted on falling edge
External clock: counted on rising edge
External clock: counted on both
rising and falling edges
Clock input is disabled
Count on 8TCNT1 overflow signal*
Count on 8TCNT0 compare match
A*
CKS1
R/W
1
0
CKS0
R/W
0
0
8-bit timer channel 0
8-bit timer channel 1
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