HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 331
HD6413008F
Manufacturer Part Number
HD6413008F
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6413008F.pdf
(686 pages)
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10.2
10.2.1
PADDR is an 8-bit write-only register that selects input or output for each pin in port A.
Port A is multiplexed with pins TP
be set to 1. For further information about PADDR, see section 7.11, Port A.
10.2.2
PADR is an 8-bit readable/writable register that stores TPC output data for groups 0 and 1, when
these TPC output groups are used.
For further information about PADR, see section 7.11, Port A.
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Note:
*
Register Descriptions
Port A Data Direction Register (PADDR)
Port A Data Register (PADR)
Bits selected for TPC output by NDERA settings become read-only bits.
PA DDR
R/(W)
PA
7
W
0
7
0
7
7
*
PA DDR
R/(W)
PA
6
W
0
6
0
6
6
7
*
to TP
PA DDR
R/(W)
PA
5
W
0
5
0
5
0
. Bits corresponding to pins used for TPC output must
5
*
Port A data direction 7 to 0
These bits select input or
output for port A pins
Port A data 7 to 0
These bits store output data
for TPC output groups 0 and 1
10. Programmable Timing Pattern Controller (TPC)
PA DDR
R/(W)
PA
4
W
0
4
0
4
4
*
Rev.4.00 Aug. 20, 2007 Page 287 of 638
PA DDR
R/(W)
PA
3
W
0
3
0
3
3
*
PA DDR
R/(W)
PA
2
W
0
2
0
2
2
*
PA DDR
R/(W)
PA
REJ09B0395-0400
1
W
0
1
0
1
1
*
PA DDR
R/(W)
PA
0
W
0
0
0
0
0
*
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