SE97 NXP [NXP Semiconductors], SE97 Datasheet - Page 16

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SE97

Manufacturer Part Number
SE97
Description
DDR memory module temp sensor with integrated SPD, 3.3 V
Manufacturer
NXP [NXP Semiconductors]
Datasheet

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0
NXP Semiconductors
SE97_5
Product data sheet
Fig 14. Byte Write timing
SDA
7.10.1.1 Byte Write
7.10.1 Write operations
START condition
S
7.10 EEPROM operation
1
slave address (memory)
0
The 2-kbit EEPROM is organized as either 256 bytes of 8 bits each (byte mode), or
16 pages of 16 bytes each (page mode). Accessing the EEPROM in byte mode or page
mode is automatic; partial page write of 2 bytes, 4 bytes, or 8 bytes is also supported.
Communication with the EEPROM is via the 2-wire serial I
provides an overview of the EEPROM partitioning.
The EEPROM can be read over voltage range 1.7 V to 3.6 V, but all write operations must
be done 3.0 V to 3.6 V.
In Byte Write mode the master creates a START condition and then broadcasts the slave
address, byte address, and data to be written. The slave acknowledges all 3 bytes by
pulling down the SDA line during the ninth clock cycle following each byte. The master
creates a STOP condition after the last ACK from the slave, which then starts the internal
write operation (see
request from the master.
1
Fig 13. EEPROM partitioning
0
A2 A1 A0
no write protect
write protect
by software
R/W acknowledge
0
A
from slave
Figure
FFh
7Fh
0Fh
80h
00h
Rev. 05 — 6 August 2009
DDR memory module temp sensor with integrated SPD, 3.3 V
00h 01h
14). During internal write, the slave will ignore any read/write
word address
acknowledge
from slave
07h
A
1 page
or 16 bytes
write to the memory is performed
2
C-bus or SMBus.
DATA
data
8 pages or
128 bytes
acknowledge
STOP condition;
from slave
© NXP B.V. 2009. All rights reserved.
16 pages or
256 bytes
002aab246
002aac812
A
Figure 13
P
SE97
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