SE97 NXP [NXP Semiconductors], SE97 Datasheet - Page 33

• Manufacturer Part Number: SE97
• Description: DDR memory module temp sensor with integrated SPD, 3.3 V
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
SE97_5
Product data sheet
8.9 SMBus register
Table 25.
Table 26.
Bit
Symbol
Default
Access
Bit
15:8
7
6:1
0
Bit
Symbol
Default
Access
Symbol
RFU
STMOUT
RFU
SALRT
SMBus Time-out register bit allocation
SMBus Time-out register bit description
STMOUT
R/W
15
R
0
7
0
Description
reserved; always ‘0’
SMBus time-out.
When either of the Critical Trip or Alarm Window lock bits is set, this bit
cannot be altered until unlocked.
reserved; always ‘0’
SMBus Alert Response Address (ARA).
When either of the Critical Trip or Alarm Window lock bits is set, this bit
cannot be altered until unlocked.
Rev. 05 — 6 August 2009
DDR memory module temp sensor with integrated SPD, 3.3 V
0 — SMBus time-out is enabled (default)
1 — disable SMBus time-out
0 — SMBus ARA is enabled (default)
1 — disable SMBus ARA
14
R
0
R
6
0
13
R
0
R
5
0
12
R
0
R
4
0
RFU
RFU
11
R
0
R
3
0
10
R
0
R
2
0
© NXP B.V. 2009. All rights reserved.
R
9
0
R
1
0
SE97
SALRT
R/W
33 of 54
R
8
0
0
0