SE97 NXP [NXP Semiconductors], SE97 Datasheet - Page 30

• Manufacturer Part Number: SE97
• Description: DDR memory module temp sensor with integrated SPD, 3.3 V
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
SE97_5
Product data sheet
8.5.2 Lower Boundary Alarm Trip register (16-bit read/write)
8.5.3 Critical Alarm Trip register (16-bit read/write)
The value is the lower threshold temperature value for Alarm mode. The data format is
2’s complement with bit 2 = 0.25 C. RFU bits will always report zero. Interrupts will
respond to the presently programmed boundary values. If boundary values are being
altered in-system, it is advised to turn off interrupts until a known state can be obtained to
avoid superfluous interrupt activity.
Table 17.
Table 18.
The value is the critical temperature. The data format is 2’s complement with
bit 2 = 0.25 C. RFU bits will always report zero.
Table 19.
Table 20.
Bit
Symbol
Default
Access
Bit
15:13
12
11:2
1:0
Bit
Symbol
Default
Access
Bit
15:13
12
11:2
1:0
Bit
Symbol
Default
Access
Bit
Symbol
Default
Access
Symbol
RFU
SIGN
LBT
RFU
Symbol
RFU
SIGN
CT
RFU
Lower Boundary Alarm Trip register bit allocation
Lower Boundary Alarm Trip register bit description
Lower Boundary Alarm Trip register bit allocation
Critical Alarm Trip register bit description
R/W
R/W
15
15
R
R
0
0
7
0
7
0
RFU
RFU
Rev. 05 — 6 August 2009
R/W
R/W
14
14
DDR memory module temp sensor with integrated SPD, 3.3 V
R
R
0
0
6
0
6
0
Description
reserved; always ‘0’
Sign (MSB)
Lower Boundary Alarm Trip Temperature (LSB = 0.25 C)
reserved; always ‘0’
Description
reserved; always ‘0’
Sign (MSB)
Critical Alarm Trip Temperature (LSB = 0.25 C)
reserved; always ‘0’
R/W
R/W
13
13
R
R
0
0
5
0
5
0
LBT
CT
SIGN
SIGN
R/W
R/W
R/W
R/W
12
12
0
0
4
0
4
0
R/W
R/W
R/W
R/W
11
11
0
0
3
0
3
0
R/W
R/W
R/W
R/W
10
10
0
0
2
0
2
0
LBT
CT
© NXP B.V. 2009. All rights reserved.
R/W
R/W
9
0
R
9
0
R
1
0
1
0
RFU
RFU
SE97
R/W
R/W
30 of 54
8
0
8
0
R
R
0
0
0
0