SE97 NXP [NXP Semiconductors], SE97 Datasheet - Page 27

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SE97

Manufacturer Part Number
SE97
Description
DDR memory module temp sensor with integrated SPD, 3.3 V
Manufacturer
NXP [NXP Semiconductors]
Datasheet

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NXP Semiconductors
Table 13.
SE97_5
Product data sheet
Action
sets
clears
Below Alarm Window bit (bit 13)
Temperature
slope
falling
rising
Hysteresis enable
Table 12.
Bit
0
Fig 21. Hysteresis: how it works
Threshold
temperature
T
T
trip(l)
trip(l)
Above Alarm Window
Below Alarm Window
Symbol
EMD
Above Critical Trip
bit 14 = AAW bit)
bit 13 = BAW bit)
critical alarm
bit 15 = ACT bit)
T
upper alarm
lower alarm
hys
Configuration register (address 01h) bit description
(register 05h;
(register 05h;
(register 05h;
threshold
threshold
threshold
Description
EVENT Mode.
When either of the Critical Trip or Alarm Window lock bits is set, this bit cannot
be altered until unlocked.
0 — comparator output mode (default)
1 — interrupt mode
Above Alarm Window bit (bit 14)
Temperature
slope
rising
falling
temperature
Rev. 05 — 6 August 2009
DDR memory module temp sensor with integrated SPD, 3.3 V
set
clear
clear
Threshold
temperature
T
T
trip(u)
trip(u)
T
current temperature
hys
clear
set
set
Above Critical Trip bit (bit 15)
Temperature
slope
rising
falling
…continued
hysteresis
clear
clear
hysteresis
© NXP B.V. 2009. All rights reserved.
Threshold
temperature
T
T
th(crit)
th(crit)
002aac799
time
hysteresis
SE97
T
hys
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