SE97 NXP [NXP Semiconductors], SE97 Datasheet - Page 17

• Manufacturer Part Number: SE97
• Description: DDR memory module temp sensor with integrated SPD, 3.3 V
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
SE97_5
Product data sheet
Fig 15. Page Write timing
SDA
7.10.1.2 Page Write
7.10.1.3 Acknowledge polling
7.10.2 Memory protection
S
START condition
1
slave address (memory)
0
The SE97 contains 256 bytes of data, arranged in 16 pages of 16 bytes each. The page is
selected by the four Most Significant Bits (MSB) of the address byte presented to the
device after the slave address, while the four Least Significant Bits (LSB) point to the byte
within the page. By loading more than one data byte into the device, up to an entire page
can be written in one write cycle (see
increment automatically after each data byte. If the master transmits more than
16 data bytes, then earlier bytes will be overwritten by later bytes in a wrap-around fashion
within the selected page. The internal write cycle is started following the STOP condition
created by the master.
Acknowledge polling can be used to determine if the SE97 is busy writing or is ready to
accept commands. Polling is implemented by sending a ‘Selective Read’ command
(described in
acknowledge the slave address as long as internal write is in progress.
The lower half (the first 128 bytes) of the memory can be write protected by special
EEPROM commands without an external control pin. The SE97 features three types of
memory write protection instructions, and three respective read Protection instructions.
The level of write-protection (set or clear) that has been defined using these instructions
remained defined even after power cycle.
The memory protection commands are:
1
•
•
•
•
•
•
0
Permanent Write Protection (PWP)
Reversible Write Protection (RWP)
Clear Write Protection (CWP)
Read Permanent Write Protection (RPWP)
Read Reversible Write Protection (RRWP)
Read Clear Write Protection (RCWP)
A2 A1 A0
Section 7.10.3 “Read
R/W acknowledge
0
A
from slave
Rev. 05 — 6 August 2009
DDR memory module temp sensor with integrated SPD, 3.3 V
word address
operations”) to the device. The SE97 will not
Figure
acknowledge
from slave
15). The internal byte address counter will
A
write to the memory is performed
data to memory
data to memory
DATA n
DATA n
15
acknowledge
acknowledge
STOP condition;
from slave
from slave
© NXP B.V. 2009. All rights reserved.
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A
A
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