PM8610-BIAP PMC [PMC-Sierra, Inc], PM8610-BIAP Datasheet - Page 121
![no-image](/images/no-image-200.jpg)
PM8610-BIAP
Manufacturer Part Number
PM8610-BIAP
Description
SBS Telecom Standard Product Data Sheet Preliminary
Manufacturer
PMC [PMC-Sierra, Inc]
Datasheet
1.PM8610-BIAP.pdf
(338 pages)
- Current page: 121 of 338
- Download datasheet (2Mb)
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000168, Issue 3
Register 014H: SBS Master Signal Monitor #1, Accumulation Trigger
This register provides activity monitoring on major SBS inputs. When a monitored input makes a
low to high transition, the corresponding register bit is set high. The bit will remain high until
this register is read, at which point, all the bits in this register are cleared. Bits that depend on
multiple inputs making a low to high transition must have each input make a low to high
transition between subsequent reads before the activity bit will be set high. The corresponding
register bit reading low indicates a lack of transitions. This register should be read periodically to
detect for stuck at conditions.
Writing to this register delimits the accumulation intervals in the various performance monitor
accumulation registers. Counts accumulated in those registers are transferred to holding registers
where they can be read. The counters themselves are then cleared to begin accumulating events
for a new accumulation interval. To prevent loss of data, accumulation intervals must be 1.0
second or shorter. The bits in this register are not affected by write accesses.
RTPLA
RV5A
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The RTPL active bits (RTPLA) detects low to high transitions on the RTPL input. RTPLA is
set high when a rising edge has been observed on the RTPL input, and is set low when this
register is read.
The RV5 active bits (RV5A) detects low to high transitions on the RV5 input. RV5A is set
high when a rising edge has been observed on the RV5 input, and is set low when this register
is read.
Type
R
R
R
R
R
R
R
R
R
R
R
RV5A
RPLA
RDATAA
RC1FPA
SYSCLKA
SREFCLKA
IC1FPA[4]
IC1FPA[3]
IC1FPA[2]
IC1FPA[1]
Function
Unused
Unused
Unused
Unused
Unused
RTPLA
SBS Telecom Standard Product Data Sheet
Default
0
0
0
0
0
X
X
X
X
X
X
X
X
X
X
X
Preliminary
121
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