PM8610-BIAP PMC [PMC-Sierra, Inc], PM8610-BIAP Datasheet - Page 219

• Manufacturer Part Number: PM8610-BIAP
• Description: SBS Telecom Standard Product Data Sheet Preliminary
• Manufacturer: PMC [PMC-Sierra, Inc]

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000168, Issue 3
RX_XFER_SYNC
RX_SYNC_DONE
Writing a logic one to this bit initiates a read sequence from the start of the next unread
message. The hardware aligns the message read buffer address to the start of the next unread
message and prefetches the first Dword from the unread message buffer so that it is ready to
be read from the WILC Receive FIFO Data registers.
An unread message in this context means that the s/w has not read any of the message
payload data by reading the WILC Receive FIFO Data registers.
After the RX XFER SYNC process has been completed successive reads from the Receive
FIFO return the last Dword read from the Receive FIFO and prefetch the next Dword (when
available).
This bit must be written to a logic one at the start of a message read sequence.
When multiple complete messages are being read (software knows that there is more than one
message in the FIFO using the RX_MSG_LVL bits) this bit does not need to be written
between individual message reads. It must be written for the 1
When software uses a variable length message protocol it may want to abandon reading a
message buffer before reading the entire message buffer of 8 DWords (16 Words). In this case
this bit must be written with a ‘1’ to move the message pointer to the start of the next message
buffer before starting the read of that buffer.
After writing this bit with a logic one software should not start reading the FIFO until the
RX_FI_BUSY bit has cleared.
In the worst case this will take 5 SYSCLK cycles when FAST_RD_EN = ‘1’ and 4 SYSCLK
cycles when FAST_RD_EN = ‘0’.
At this point the 1
valid. Software may abandon a CRC errored message without reading the message buffer by
writing this bit with a logic one again.
On reads this bit is always returns the RX_SYNC_DONE status.
This bit indicates the status of an RX_XFER_SYNC operation. When this bit is a logic one it
indicates that an RX_XFER_SYNC has been done. S/W should check this bit at the start of a
message read sequence or when attempting to perform a message skip sequence.
st
DWORD of the message is available for reading and the CRC_ERR bit is
SBS Telecom Standard Product Data Sheet
st
message.
Preliminary
219