PM8610-BIAP PMC [PMC-Sierra, Inc], PM8610-BIAP Datasheet - Page 94

• Manufacturer Part Number: PM8610-BIAP
• Description: SBS Telecom Standard Product Data Sheet Preliminary
• Manufacturer: PMC [PMC-Sierra, Inc]

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000168, Issue 3
OCMP_SRC[1:0]
OCMP_VAL
RWSEL_SRC
RWSEL_VAL
PARALLEL_MODE
The OCMP_SRC[1:0] bits select the source for the outgoing connection memory page
information.
The OCMP_VAL bit controls the selection of the connection memory page in each Outgoing
Memory Switch Unit, OMSU. When OCMP_VAL is a logic one, connection memory page 1
is selected. When OCMP_VAL is a logic zero, connection memory page 0 is selected.
OCMP_VAL is sampled at the C1 byte position as defined by the receive frame pulse signal
(RC1FP). Changes to the connection memory page selection are synchronized to the frame
boundary of the next frame (in TelecomBus mode), 4 frame multiframe (in SBI mode without
CAS), or 48 frame multiframe (in SBI mode with CAS). This bit is only used when
OCMP_SRC[1:0] = ‘b00.
The RWSEL_SRC bit selects the source for the selection of which link, the working or the
protect, is active. When RWSEL_SRC is a logic zero, the RWSEL_VAL register bit is used
as the source for selecting the active link. When RWSEL_SRC is a logic one, the RWSEL
input is used as the source for selecting the active link.
The RWSEL_VAL bit selects between the receive working and protect links when the
RWSEL_SRC is a logic zero. When RWSEL_VAL is a logic one, the working link is
selected and the SBS listens to the data from the RPWRK and RNWRK inputs. When
RWSEL_VAL is a logic zero, the protect link is selected and the SBS listens to the data from
the RPPROT and RNPROT inputs. This bit has no effect when the RWSEL_SRC bit is a
logic one or when the parallel interface is used (PARALLEL_MODE = ‘b1).
The PARALLEL_MODE bit selects between the parallel bus or the serial LVDS links on the
transmit and receive interfaces. When PARALLEL_MODE is set to a logic one, parallel
mode is enabled. When PARALLEL_MODE is set to a logic zero, the serial LVDS mode is
enabled.
OCMP_SRC[1:0]
00
01
10
11
Source
OCMP_VAL register bit
OCMP input pin
PAGE bit from the active ILC (as determined by the
RWSEL_VAL bit or RWSEL input)
Reserved
SBS Telecom Standard Product Data Sheet
Preliminary
94