PM8610-BIAP PMC [PMC-Sierra, Inc], PM8610-BIAP Datasheet - Page 84

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PM8610-BIAP

Manufacturer Part Number
PM8610-BIAP
Description
SBS Telecom Standard Product Data Sheet Preliminary
Manufacturer
PMC [PMC-Sierra, Inc]
Datasheet
10.18 In-band Link Controller
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000168, Issue 3
In order to permit centralized control of distributed NSE/SBS fabrics from the NSE
microprocessor interface (for applications in which NSEs are located on fabric cards, and SBSs
are located on multiple line cards), an in-band signaling channel is provided between the NSE and
the SBS over the Serial interface. Each NSE can control up to 32 SBSs which are attached by the
LVDS links. The NSE-SBS in-band channel is full duplex, but the NSE has active control of the
link.
The SBS contains two independent In-Band Link Controllers. One ILC is connected to the
Working Transmit Serial LVDS Link and the other is connected to the Protection Transmit Serial
LVDS Link.
The in-band channel is carried in the first 36 columns of four rows of the SBI or TelecomBus
structure, rows 3, 6, 7 and 8. The overall in-band channel capacity is thus 36*4*64kb/s =
9.216Mb/s. Each 36 bytes per row allocated to the in-band signaling channel is its own in-band
message between the end points. Four bytes of each 36 byte inband message are reserved for end-
to-end control information and error protection, leaving 8.192Mb/s available for user data transfer
between the end points.
The data transferred between the end points has no fixed format, effectively providing a clear
channel for packet transfer between the attached microprocessors at each of the LVDS link
terminating devices. Using the microprocessor interface, the user is able to send and receive any
packet up to 32 bytes in length. The first two bytes of each 36 byte message contains a header and
the last two bytes of the message is a CRC-16 which detects errors in the message.
This in-band channel is expected to be used almost entirely to carry out switching control changes
in the SBSs. To configure a DS0 in an SBS device most often requires a local microprocessor to
write to one memory location consisting of a 16-bit address and a 16-bit data. Using this as a
baseline and assuming an efficient use of the in-band channel bandwidth we can set a maximum
of (32bytes/row * 4 rows/frame * 8000 frames/sec / 4 bytes/write) 256,000 DS0 configurations
per second.
Considering that configuring a T1 when switching DS0s requires 27 DS0 writes indicates that the
in-band signaling channel bandwidth sets maximum limit of over 9000 T1 configurations per
second. In real life these limits will not be achieved but this shows that the in-band link should
not be the bottleneck. In TelecomBus mode this same configuration will require only 3 writes per
T1 link.
In N+1 protected architectures it is likely that full configuration of a port card will be necessary
during the switchover. This would require the entire connection memory be reconfigured.
Assuming connections for overhead bytes are also reconfigured, the fastest that a complete
reconfiguration can take place is 9720 register writes which equates to (9720 writes * 4
bytes/write / (32 bytes/row * 4 rows/frame * 8000 frames/second)) 38 milliseconds. It is also
possible that the spare card could hold all the connection configurations for all the port cards it is
protecting locally, for even faster switch over.
SBS Telecom Standard Product Data Sheet
Preliminary
84

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