PM8610-BIAP PMC [PMC-Sierra, Inc], PM8610-BIAP Datasheet - Page 313

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PM8610-BIAP

Manufacturer Part Number
PM8610-BIAP
Description
SBS Telecom Standard Product Data Sheet Preliminary
Manufacturer
PMC [PMC-Sierra, Inc]
Datasheet
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000168, Issue 3
When switching tributaries in SBI mode or when in TelecomBus mode the SBS is acting as a
column switch and introduces a minimum delay equivalent to one row in a 77.76 MHz
TelecomBus structure or SBI336 bus structure. This minimum delay equates to 1080 SYSCLK
cycles. The actual delay will be slightly longer by no more than 31 SYSCLK cycles to allow for
other data path delays within the SBS.
Figure 36 Incoming TelecomBus to LVDS Functional Timing
When switching DS0s in SBI mode the minimum data delay through the SBS increases to an
entire SBI336 frame or 9720 SYSCLK cycles. The actual delay will be slightly longer by no
more than 31 SYSCLK cycles to allow for other data path delays within the SBS. The Channel
Associated Signaling delay through the SBS will be two full T1 or E1 multiframes which is 4 mS
for E1 links and 6 mS for T1 links.
Figure 37 Incoming SBI Bus to LVDS Timing with DS0 Switching
The relative delay from the Incoming bus to either of the working and protect LVDS links may be
different but will be within a couple of SYSCLK cycles of each other.
Although Figure 36 and Figure 37 show IC1FP or IJ0J1V1 relative to SYSCLK, IC1FP(IJ0J1V1)
is sampled by SREFCLK at either 77.76 MHz or 19.44 MHz.
IC1FP (IJ0J1V1)
TNPROT/
TNWRK/
SYSCLK
TPPROT
TPWRK
TC1FP
IC1FP
TNPROT/
IPL[x]
SYSCLK
TNWRK/
TPPROT
TPWRK
TC1FP
IPL[x]
...
...
Maximum Delay, 9720 + 31 cycles
Minimum Delay, 9720 + 23 cycles
...
...
Maximum Delay, 1080 + 31 cycles
Minimum Delay, 1080 + 23 cycles
Delay J0 on IJ0J1V1 to TC1FP, 1080 + 32 cycles
Delay IC1FP to TC1FP, 9720 + 32 cycles
S4,3 / A2
S1,1 / J0
C1
SBS Telecom Standard Product Data Sheet
...
...
...
...
S1,1 / J0
C1
S2,1 / Z0
Preliminary
313

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