PM8610-BIAP PMC [PMC-Sierra, Inc], PM8610-BIAP Datasheet - Page 92

• Manufacturer Part Number: PM8610-BIAP
• Description: SBS Telecom Standard Product Data Sheet Preliminary
• Manufacturer: PMC [PMC-Sierra, Inc]

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000168, Issue 3
Register 000H: SBS Master Reset
Reserved
ARESET
DRESET
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
These bits must be set low for proper operation of the SBS.
The analogue reset bit (ARESET) allows the analogue circuitry in the SBS to be reset and
disabled under software control. When the ARESET bit is set high, all SBS analogue
circuitry is held in reset and disabled. This bit is not self-clearing. Therefore, it must be set
low to bring the affected circuitry out of reset and enable it. Holding SBS in analogue reset
state places it into a low power, disabled mode. A hardware reset clears the ARESET bit, thus
negating the analogue software reset.
The digital reset bit (DRESET) allows the digital circuitry in the SBS to be reset under
software control. When the DRESET bit is set high, all SBS digital circuitry is held in reset
with the exception of this register. This bit is not self-clearing. Therefore, it must be set low
to bring the affected circuitry out of reset. Holding SBS in digital reset state places it into a
low power, digital stand-by mode. A hardware reset clears the DRESET bit, thus negating the
digital software reset.
Type
R/W
R/W
R/W
R/W
R/W
R/W
Reserved
Reserved
Reserved
Reserved
ARESET
DRESET
Function
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
SBS Telecom Standard Product Data Sheet
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Preliminary
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