PM8610-BIAP PMC [PMC-Sierra, Inc], PM8610-BIAP Datasheet - Page 249

• Manufacturer Part Number: PM8610-BIAP
• Description: SBS Telecom Standard Product Data Sheet Preliminary
• Manufacturer: PMC [PMC-Sierra, Inc]

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000168, Issue 3
TPINS
FIFOERRE
Reserved
The Test Pattern Insertion (TPINS) controls the insertion of test pattern in the protection
transmit serial data stream for jitter testing purpose. When this bit is set high, the test pattern
stored in the registers (TP[9:0]) is used to replace all the overhead and payload bytes of the
transmit data stream. When TPINS is set low, no test pattern is inserted.
The FIFO overrun/underrun error interrupt enable bit (FIFOERRE) enables FIFO
overrun/underrun interrupts. An interrupt is generated on a FIFO error event if the
FIFOERRE is set to logic one. No interrupt is generated if FIFOERRE if is set to logic zero.
These bits must be set low for correct operation of the SBS.
SBS Telecom Standard Product Data Sheet
Preliminary
249