PM8610-BIAP PMC [PMC-Sierra, Inc], PM8610-BIAP Datasheet - Page 49
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PM8610-BIAP
Manufacturer Part Number
PM8610-BIAP
Description
SBS Telecom Standard Product Data Sheet Preliminary
Manufacturer
PMC [PMC-Sierra, Inc]
Datasheet
1.PM8610-BIAP.pdf
(338 pages)
- Current page: 49 of 338
- Download datasheet (2Mb)
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000168, Issue 3
Pin Name
RSTB
JTAG Interface (5 Signals)
TCK
TMS
TDI
TDO
TRSTB
Analog Reference Resistors (2 Signals)
RES
RESK
Analog Test Bus (2 Signals)
ATB0
ATB1
Type
Input
Input
Input
Input
Tristate
Input
Analog
Analog
Analog
Analog
Pin No.
AC22
P2
P3
R1
M2
P4
F25
F26
M24
M23
Reset Enable Bar. The active low reset signal, RSTB, provides an
asynchronous SBS reset. RSTB is a Schmitt triggered input with
an integral pull-up resistor.
Test Clock. The JTAG test clock signal, TCK, provides timing for
test operations that are carried out using the IEEE P1149.1 test
access port.
Test Mode Select. The JTAG test mode select signal, TMS,
controls the test operations that are carried out using the IEEE
P1149.1 test access port. TMS is sampled on the rising edge of
TCK. TMS has an integral pull-up resistor.
Test Data Input. The JTAG test data input signal, TDI, carries test
data into the SBS via the IEEE P1149.1 test access port. TDI is
sampled on the rising edge of TCK. TDI has an integral pull-up
resistor.
Test Data Output. The JTAG test data output signal, TDO, carries
test data out of the SBS via the IEEE P1149.1 test access port.
TDO is updated on the falling edge of TCK. TDO is a tri-state
output which is inactive except when scanning of data is in
progress.
Test Reset Bar. The active low JTAG test reset signal, TRSTB,
provides an asynchronous SBS test access port reset via the IEEE
P1149.1 test access port. TRSTB is a Schmitt triggered input with
an integral pull-up resistor.
Note that when TRSTB is not being used, it must be connected to
the RSTB input.
Reference Resistor Connection (RES). An off-chip 3.16k
resistor is connected between this positive resistor reference pin
and a Kelvin ground pin, RESK. An on-chip negative feedback path
will force the 0.8 V VREF onto RES, therefore forcing 252uA of
current to flow through the resistor.
Reference Resistor Connection (RESK). An off-chip 3.16 k
±1% resistor is connected between the positive resistor reference
pin, RESK, and this Kelvin ground pin. An on-chip negative
feedback path will force the 0.8 VREF onto RESK, therefore forcing
252 uA of current to flow through the resistor.
Analog test pin (ATB0). This pin is used for PMC validation and
testing.
Analog test pin (ATB1). This pin is used for PMC validation and
testing.
Function
SBS Telecom Standard Product Data Sheet
Preliminary
±1%
49
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