TMPSNS-RTD1 Microchip Technology, TMPSNS-RTD1 Datasheet - Page 104
TMPSNS-RTD1
Manufacturer Part Number
TMPSNS-RTD1
Description
BOARD EVAL PT100 RTD TEMP SENSOR
Manufacturer
Microchip Technology
Datasheets
1.MCP3301-CIMS.pdf
(32 pages)
2.PCM18XR1.pdf
(438 pages)
3.MCP6S22DM-PICTL.pdf
(43 pages)
4.TMPSNS-RTD1.pdf
(26 pages)
Specifications of TMPSNS-RTD1
Sensor Type
Temperature
Interface
USB
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
MCP3301, MCP6S26, PIC18F2550
Processor To Be Evaluated
MCP6S26, MCP3301, MCP6024, MCP41010, PIC18F2550, TC1071, MCP6002
Data Bus Width
12 bit
Interface Type
USB
Lead Free Status / RoHS Status
Not applicable / Not applicable
Voltage - Supply
-
Sensitivity
-
Sensing Range
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Not applicable / Not applicable
- MCP3301-CIMS PDF datasheet
- PCM18XR1 PDF datasheet #2
- MCP6S22DM-PICTL PDF datasheet #3
- TMPSNS-RTD1 PDF datasheet #4
- Current page: 104 of 438
- Download datasheet (7Mb)
PIC18F2455/2550/4455/4550
REGISTER 9-2:
DS39632E-page 102
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note:
R/W-1
RBPU
Interrupt flag bits are set when an interrupt condition occurs regardless of the state of its corresponding
enable bit or the global interrupt enable bit. User software should ensure the appropriate interrupt flag bits
are clear prior to enabling an interrupt. This feature allows for software polling.
RBPU: PORTB Pull-up Enable bit
1 = All PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual port latch values
INTEDG0: External Interrupt 0 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG1: External Interrupt 1 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG2: External Interrupt 2 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
Unimplemented: Read as ‘0’
TMR0IP: TMR0 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
RBIP: RB Port Change Interrupt Priority bit
1 = High priority
0 = Low priority
INTEDG0
R/W-1
INTCON2: INTERRUPT CONTROL REGISTER 2
W = Writable bit
‘1’ = Bit is set
INTEDG1
R/W-1
INTEDG2
R/W-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
TMR0IP
R/W-1
© 2009 Microchip Technology Inc.
x = Bit is unknown
U-0
—
R/W-1
RBIP
bit 0
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