TMPSNS-RTD1 Microchip Technology, TMPSNS-RTD1 Datasheet - Page 213

BOARD EVAL PT100 RTD TEMP SENSOR

TMPSNS-RTD1

Manufacturer Part Number
TMPSNS-RTD1
Description
BOARD EVAL PT100 RTD TEMP SENSOR
Manufacturer
Microchip Technology
Datasheets

Specifications of TMPSNS-RTD1

Sensor Type
Temperature
Interface
USB
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
MCP3301, MCP6S26, PIC18F2550
Processor To Be Evaluated
MCP6S26, MCP3301, MCP6024, MCP41010, PIC18F2550, TC1071, MCP6002
Data Bus Width
12 bit
Interface Type
USB
Lead Free Status / RoHS Status
Not applicable / Not applicable
Voltage - Supply
-
Sensitivity
-
Sensing Range
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Not applicable / Not applicable
REGISTER 19-6:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-2
bit 1
bit 0
Note 1:
R/W-0
GCEN
If the I
writes to the SSPBUF are disabled).
GCEN: General Call Enable bit (Slave mode only)
1 = Enable interrupt when a general call address (0000h) is received in the SSPSR
0 = General call address disabled
ACKSTAT: Acknowledge Status bit
Unused in Slave mode.
ADMSK5:ADMSK2: Slave Address Mask Select bits
1 = Masking of corresponding bits of SSPADD enabled
0 = Masking of corresponding bits of SSPADD disabled
ADMSK1: Slave Address Mask Select bit
In 7-Bit Addressing mode:
1 = Masking of SPADD<1> only enabled
0 = Masking of SPADD<1> only disabled
In 10-Bit Addressing mode:
1 = Masking of SSPADD<1:0> enabled
0 = Masking of SSPADD<1:0> disabled
SEN: Stretch Enable bit
1 = Clock stretching is enabled for both slave transmit and slave receive (stretch enabled)
0 = Clock stretching is disabled
2
ACKSTAT
C module is active, this bit may not be set (no spooling) and the SSPBUF may not be written (or
R/W-0
SSPCON2: MSSP CONTROL REGISTER 2 (I
W = Writable bit
‘1’ = Bit is set
ADMSK5
R/W-0
(1)
PIC18F2455/2550/4455/4550
ADMSK4
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
ADMSK3
R/W-0
2
C™ SLAVE MODE)
ADMSK2
R/W-0
x = Bit is unknown
ADMSK1
R/W-0
DS39632E-page 211
SEN
R/W-0
(1)
bit 0

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