TMPSNS-RTD1 Microchip Technology, TMPSNS-RTD1 Datasheet - Page 427

• Manufacturer Part Number: TMPSNS-RTD1
• Description: BOARD EVAL PT100 RTD TEMP SENSOR
• Manufacturer: Microchip Technology

Specifications of TMPSNS-RTD1

• Sensor Type: Temperature
• Interface: USB
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: MCP3301, MCP6S26, PIC18F2550
• Processor To Be Evaluated: MCP6S26, MCP3301, MCP6024, MCP41010, PIC18F2550, TC1071, MCP6002
• Data Bus Width: 12 bit
• Interface Type: USB
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• Voltage - Supply: -
• Sensitivity: -
• Sensing Range: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Not applicable / Not applicable

DC and AC Characteristics
DC Characteristics ........................................................... 379
DCFSNZ .......................................................................... 333
DECF ............................................................................... 332
DECFSZ ........................................................................... 333
Dedicated ICD/ICSP Port ................................................. 311
Development Support ...................................................... 363
Device Differences ........................................................... 419
Device Overview .................................................................. 7
Device Reset Timers .......................................................... 49
Direct Addressing ............................................................... 75
E
Effect on Standard PIC MCU Instructions .................. 77, 360
Electrical Characteristics .................................................. 367
Enhanced Capture/Compare/PWM (ECCP) .................... 151
Enhanced Universal Synchronous Asynchronous
Equations
Errata ................................................................................... 5
EUSART
© 2009 Microchip Technology Inc.
Graphs and Tables .................................................. 407
Power-Down and Supply Current ............................ 370
Supply Voltage ......................................................... 369
Features (table) ............................................................ 9
New Core Features ...................................................... 7
Other Special Features ................................................ 8
Oscillator Start-up Timer (OST) ................................. 49
PLL Lock Time-out ..................................................... 49
Power-up Timer (PWRT) ........................................... 49
Associated Registers ............................................... 164
Capture and Compare Modes .................................. 152
Capture Mode. See Capture (ECCP Module).
Outputs and Configuration ....................................... 152
Pin Configurations for ECCP1 ................................. 152
PWM Mode. See PWM (ECCP Module).
Standard PWM Mode ............................................... 152
Timer Resources ...................................................... 152
Receiver Transmitter (EUSART). See EUSART.
A/D Acquisition Time ................................................ 270
A/D Minimum Charging Time ................................... 270
Calculating the Minimum Required A/D
Asynchronous Mode ................................................ 253
Baud Rate Generator
Baud Rate Generator (BRG) .................................... 247
Acquisition Time .............................................. 270
12-Bit Break Transmit and Receive ................. 259
Associated Registers, Receive ........................ 257
Associated Registers, Transmit ....................... 255
Auto-Wake-up on Sync Break Character ......... 258
Receiver ........................................................... 256
Setting up 9-Bit Mode with
Transmitter ....................................................... 253
Operation in Power-Managed Modes .............. 247
Associated Registers ....................................... 248
Auto-Baud Rate Detect .................................... 251
Baud Rate Error, Calculating ........................... 248
Baud Rates, Asynchronous Modes ................. 249
High Baud Rate Select (BRGH Bit) ................. 247
Sampling .......................................................... 247
Address Detect ........................................ 256
PIC18F2455/2550/4455/4550
Extended Instruction Set ................................................. 355
External Clock Input ........................................................... 26
F
Fail-Safe Clock Monitor ........................................... 291, 306
Fast Register Stack ........................................................... 62
Firmware Instructions ...................................................... 313
Flash Program Memory ..................................................... 81
FSCM. See Fail-Safe Clock Monitor.
G
GOTO .............................................................................. 334
H
Hardware Multiplier ............................................................ 97
Synchronous Master Mode ...................................... 260
Synchronous Slave Mode ........................................ 263
ADDFSR .................................................................. 356
ADDULNK ............................................................... 356
and Using MPLAB IDE Tools .................................. 362
CALLW .................................................................... 357
Considerations for Use ............................................ 360
MOVSF .................................................................... 357
MOVSS .................................................................... 358
PUSHL ..................................................................... 358
SUBFSR .................................................................. 359
SUBULNK ................................................................ 359
Syntax ...................................................................... 355
Exiting the Operation ............................................... 306
Interrupts in Power-Managed Modes ...................... 307
POR or Wake-up from Sleep ................................... 307
WDT During Oscillator Failure ................................. 306
Associated Registers ................................................. 89
Control Registers ....................................................... 82
Erase Sequence ........................................................ 86
Erasing ...................................................................... 86
Operation During Code-Protect ................................. 89
Protection Against Spurious Writes ........................... 89
Reading ..................................................................... 85
Table Pointer
Table Pointer Boundaries .......................................... 84
Table Reads and Table Writes .................................. 81
Unexpected Termination of Write .............................. 89
Write Sequence ......................................................... 87
Write Verify ................................................................ 89
Writing To .................................................................. 87
Introduction ................................................................ 97
Operation ................................................................... 97
Performance Comparison .......................................... 97
Associated Registers, Receive ........................ 262
Associated Registers, Transmit ....................... 261
Reception ........................................................ 262
Transmission ................................................... 260
Associated Registers, Receive ........................ 264
Associated Registers, Transmit ....................... 263
Reception ........................................................ 264
Transmission ................................................... 263
EECON1 and EECON2 ..................................... 82
TABLAT (Table Latch) Register ........................ 84
TBLPTR (Table Pointer) Register ...................... 84
Boundaries Based on Operation ....................... 84
DS39632E-page 425