DV164136 Microchip Technology, DV164136 Datasheet - Page 139

• Manufacturer Part Number: DV164136
• Description: DEVELOPMENT KIT FOR PIC18
• Manufacturer: Microchip Technology
• Series: PIC®r
• Type: MCUr

Specifications of DV164136

• Contents: Board, Cables, CDs, PICkit™ 3 Programmer, Power Supply
• Processor To Be Evaluated: PIC18F8722, PIC18F87J11
• Interface Type: RS-232, USB
• Operating Supply Voltage: 3.3 V, 5 V
• Silicon Manufacturer: Microchip
• Core Architecture: PIC
• Core Sub-architecture: PIC18
• Silicon Core Number: PIC18F
• Silicon Family Name: PIC18F8xxx
• Kit Contents: PIC18 Exp Brd PICkit 3 Cable CD PSU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: PIC18F8722, PIC18F87J11
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 10-10: PORTD FUNCTIONS
© 2009 Microchip Technology Inc.
RD0/AD0/
PMD0
RD1/AD1/
PMD1
RD2/AD2/
PMD2
RD3/AD3/
PMD3
RD4/AD4/
PMD4/SDO2
RD5/AD5/
PMD5/SDI2/
SDA2
Legend:
Note 1:
Pin Name
2:
3:
O = Output, I = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
External memory interface I/O takes priority over all other digital and PMP I/O.
Available on 80-pin devices only.
Default configuration for PMP (PMPMX Configuration bit = 1).
Function
PMD0
PMD1
PMD2
PMD3
PMD4
PMD5
AD0
AD1
AD2
AD3
AD4
AD5
SDO2
SDA2
SDI2
RD0
RD1
RD2
RD3
RD4
RD5
(2)
(2)
(2)
(2)
(2)
(2)
(3)
(3)
(3)
(3)
(3)
(3)
Setting
TRIS
0
1
x
x
x
x
0
1
x
x
x
x
0
1
x
x
x
x
0
1
x
x
x
x
0
1
x
x
x
x
0
0
1
x
x
x
x
1
1
1
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
DIG
TTL
DIG
TTL
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
LATD<0> data output.
PORTD<0> data input.
External memory interface, address/data bit 0 output.
External memory interface, data bit 0 input.
Parallel Master Port data out.
Parallel Master Port data input.
LATD<1> data output.
PORTD<1> data input.
External memory interface, address/data bit 1 output.
External memory interface, data bit 1 input.
Parallel Master Port data out.
Parallel Master Port data input.
LATD<2> data output.
PORTD<2> data input.
External memory interface, address/data bit 2 output.
External memory interface, data bit 2 input.
Parallel Master Port data out.
Parallel Master Port data input.
LATD<3> data output.
PORTD<3> data input.
External memory interface, address/data bit 3 output.
External memory interface, data bit 3 input.
Parallel Master Port data out.
Parallel Master Port data input.
LATD<4> data output.
PORTD<4> data input.
External memory interface, address/data bit 4 output.
External memory interface, data bit 4 input.
Parallel Master Port data out.
Parallel Master Port data input.
SPI data output (MSSP2 module); takes priority over port data.
LATD<5> data output.
PORTD<5> data input.
External memory interface, address/data bit 5 output.
External memory interface, data bit 5 input.
Parallel Master Port data out.
Parallel Master Port data input.
SPI data input (MSSP2 module).
I
I
setting.
2
2
C™ data output (MSSP2 module); takes priority over port data.
C data input (MSSP2 module); input type depends on module
PIC18F87J11 FAMILY
Description
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DS39778D-page 139
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