DV164136 Microchip Technology, DV164136 Datasheet - Page 97

• Manufacturer Part Number: DV164136
• Description: DEVELOPMENT KIT FOR PIC18
• Manufacturer: Microchip Technology
• Series: PIC®r
• Type: MCUr

Specifications of DV164136

• Contents: Board, Cables, CDs, PICkit™ 3 Programmer, Power Supply
• Processor To Be Evaluated: PIC18F8722, PIC18F87J11
• Interface Type: RS-232, USB
• Operating Supply Voltage: 3.3 V, 5 V
• Silicon Manufacturer: Microchip
• Core Architecture: PIC
• Core Sub-architecture: PIC18
• Silicon Core Number: PIC18F
• Silicon Family Name: PIC18F8xxx
• Kit Contents: PIC18 Exp Brd PICkit 3 Cable CD PSU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: PIC18F8722, PIC18F87J11
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.5.2
The PIC18F87J11 Family of devices have a feature
that allows programming a single word (two bytes).
This feature is enable when the WPROG bit is set. If the
memory location is already erased, the following
sequence is required to enable this feature:
1.
2.
EXAMPLE 6-4:
© 2009 Microchip Technology Inc.
PROGRAM_MEMORY
Load the Table Pointer register with the address
of the data to be written
Write the 2 bytes into the holding registers and
perform a table write
Required
Sequence
FLASH PROGRAM MEMORY WRITE
SEQUENCE (WORD
PROGRAMMING).
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
TBLWT*+
MOVLW
MOVWF
TBLWT*
BSF
BSF
BCF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
BSF
BCF
BCF
SINGLE-WORD WRITE TO FLASH PROGRAM MEMORY
EECON1, WPROG
EECON1, WREN
INTCON, GIE
55h
EECON2
0AAh
EECON2
EECON1, WR
INTCON, GIE
EECON1, WPROG
EECON1, WREN
CODE_ADDR_UPPER
TBLPTRU
CODE_ADDR_HIGH
TBLPTRH
CODE_ADDR_LOW
TBLPTRL
DATA0
TABLAT
DATA1
TABLAT
; Load TBLPTR with the base address
; enable single word write
; enable write to memory
; disable interrupts
; write 55h
; write 0AAh
; start program (CPU stall)
; re-enable interrupts
; disable single word write
; disable write to memory
PIC18F87J11 FAMILY
3.
4.
5.
6.
7.
8.
9.
Set the WREN bit (EECON1<2>) to enable byte
writes.
Disable interrupts.
Write 55h to EECON2.
Write 0AAh to EECON2.
Set the WR bit. This will begin the write cycle.
The CPU will stall for duration of the write for T
(see parameter D133A).
Re-enable interrupts.
DS39778D-page 97
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