DEMO9S08EL32 Freescale Semiconductor, DEMO9S08EL32 Datasheet - Page 106

• Manufacturer Part Number: DEMO9S08EL32
• Description: BOARD DEMO FOR 9S08 EL MCU
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S08EL32

• Contents: Evaluation Board
• Processor To Be Evaluated: MC9S08EL32
• Data Bus Width: 8 bit
• Interface Type: RS-232, USB
• Operating Supply Voltage: 12 V
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08EL
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08EL32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 7 Central Processor Unit (S08CPUV3)
106
CLC
CLI
CLR opr8a
CLRA
CLRX
CLRH
CLR oprx8,X
CLR ,X
CLR oprx8,SP
CMP #opr8i
CMP opr8a
CMP opr16a
CMP oprx16,X
CMP oprx8,X
CMP ,X
CMP oprx16,SP
CMP oprx8,SP
COM opr8a
COMA
COMX
COM oprx8,X
COM ,X
COM oprx8,SP
CPHX opr16a
CPHX #opr16i
CPHX opr8a
CPHX oprx8,SP
CPX #opr8i
CPX opr8a
CPX opr16a
CPX oprx16,X
CPX oprx8,X
CPX ,X
CPX oprx16,SP
CPX oprx8,SP
DAA
DBNZ opr8a,rel
DBNZA rel
DBNZX rel
DBNZ oprx8,X,rel
DBNZ ,X,rel
DBNZ oprx8,SP,rel
DEC opr8a
DECA
DECX
DEC oprx8,X
DEC ,X
DEC oprx8,SP
Source
Form
Clear Carry Bit (C ← 0)
Clear Interrupt Mask Bit (I ← 0)
Clear
Compare Accumulator with Memory
A – M
(CCR Updated But Operands Not Changed)
Complement
(One’s Complement) A ← (A) = $FF – (A)
Compare Index Register (H:X) with Memory
(H:X) – (M:M + $0001)
(CCR Updated But Operands Not Changed)
Compare X (Index Register Low) with
Memory
X – M
(CCR Updated But Operands Not Changed)
Decimal Adjust Accumulator
After ADD or ADC of BCD Values
Decrement A, X, or M and Branch if Not Zero
(if (result) ≠ 0)
DBNZX Affects X Not H
Decrement
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
M ← $00
A ← $00
X ← $00
H ← $00
M ← $00
M ← $00
M ← $00
M ← (M) – $01
A ← (A) – $01
X ← (X) – $01
M ← (M) – $01
M ← (M) – $01
M ← (M) – $01
Table 7-2. Instruction Set Summary (Sheet 4 of 9)
Operation
M ← (M)= $FF – (M)
X ← (X) = $FF – (X)
M ← (M) = $FF – (M)
M ← (M) = $FF – (M)
M ← (M) = $FF – (M)
INH
INH
DIR
INH
INH
INH
IX1
IX
SP1
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
DIR
INH
INH
IX1
IX
SP1
EXT
IMM
DIR
SP1
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
INH
DIR
INH
INH
IX1
IX
SP1
DIR
INH
INH
IX1
IX
SP1
Object Code
9E 6F
9E D1
9E E1
9E 63
9E F3
9E D3
9E E3
9E 6B
9E 6A
98
9A
3F
4F
5F
8C
6F
7F
A1
B1
C1
D1
E1
F1
33
43
53
63
73
3E
65
75
A3
B3
C3
D3
E3
F3
72
3B
4B
5B
6B
7B
3A
4A
5A
6A
7A
dd
ff
ff
ii
dd
hh ll
ee ff
ff
ee ff
ff
dd
ff
ff
hh ll
jj kk
dd
ff
ii
dd
hh ll
ee ff
ff
ee ff
ff
dd rr
rr
rr
ff rr
rr
ff rr
dd
ff
ff
1
1
5
1
1
1
5
4
6
2
3
4
4
3
3
5
4
5
1
1
5
4
6
6
3
5
6
2
3
4
4
3
3
5
4
1
7
4
4
7
6
8
5
1
1
5
4
6
p
p
rfwpp
p
p
p
rfwpp
rfwp
prfwpp
pp
rpp
prpp
prpp
rpp
rfp
pprpp
prpp
rfwpp
p
p
rfwpp
rfwp
prfwpp
prrfpp
ppp
rrfpp
prrfpp
pp
rpp
prpp
prpp
rpp
rfp
pprpp
prpp
p
rfwpppp
fppp
fppp
rfwpppp
rfwppp
prfwpppp
rfwpp
p
p
rfwpp
rfwp
prfwpp
Cyc-by-Cyc
Details
Freescale Semiconductor
U 1 1 – –
V 1 1 H I N Z C
– 1 1 – – – – 0
– 1 1 – 0 – – –
0 1 1 – – 0 1 –
0 1 1 – –
– 1 1 – – – – –
1 1 – –
1 1 – –
1 1 – –
1 1 – –
on CCR
Affect
1
–