DEMO9S08EL32 Freescale Semiconductor, DEMO9S08EL32 Datasheet - Page 49

BOARD DEMO FOR 9S08 EL MCU

DEMO9S08EL32

Manufacturer Part Number
DEMO9S08EL32
Description
BOARD DEMO FOR 9S08 EL MCU
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheets

Specifications of DEMO9S08EL32

Contents
Evaluation Board
Processor To Be Evaluated
MC9S08EL32
Data Bus Width
8 bit
Interface Type
RS-232, USB
Operating Supply Voltage
12 V
Silicon Manufacturer
Freescale
Core Architecture
HCS08
Core Sub-architecture
HCS08
Silicon Core Number
MC9S08
Silicon Family Name
S08EL
Rohs Compliant
Yes
For Use With/related Products
MC9S08EL32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.5.4
The burst program command is used to program sequential bytes of data in less time than would be
required using the standard program command. This is possible because the high voltage to the FLASH
array does not need to be disabled between program operations. Ordinarily, when a program or erase
command is issued, an internal charge pump associated with the FLASH memory must be enabled to
supply high voltage to the array. Upon completion of the command, the charge pump is turned off. When
a burst program command is issued, the charge pump is enabled and then remains enabled after completion
of the burst program operation if these two conditions are met:
Freescale Semiconductor
The next burst program command has been queued before the current program operation has
completed.
The next sequential address selects a byte on the same burst block as the current byte being
programmed. A burst block in this FLASH memory consists of 64 bytes. A new burst block begins
at each 64-byte address boundary.
Burst Program Execution
PROGRAM AND
ERASE FLOW
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
Figure 4-2. Program and Erase Flowchart
TO BUFFER ADDRESS AND DATA
WRITE TO FLASH OR EEPROM
0
WRITE COMMAND TO FCMD
TO LAUNCH COMMAND
AND CLEAR FCBEF
WRITE TO FCDIV
WRITE 1 TO FCBEF
CLEAR ERROR
FACCERR ?
FPVIOL OR
FACCERR ?
START
FCCF ?
DONE
1
NO
(1)
(2)
0
YES
(2)
before checking FCBEF or FCCF.
(1)
Wait at least four bus cycles
after reset.
Required only once
ERROR EXIT
Chapter 4 Memory
49

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