DEMO9S08EL32 Freescale Semiconductor, DEMO9S08EL32 Datasheet - Page 191

• Manufacturer Part Number: DEMO9S08EL32
• Description: BOARD DEMO FOR 9S08 EL MCU
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S08EL32

• Contents: Evaluation Board
• Processor To Be Evaluated: MC9S08EL32
• Data Bus Width: 8 bit
• Interface Type: RS-232, USB
• Operating Supply Voltage: 12 V
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08EL
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08EL32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.3.2
SLIC control register 2 (SLCC2) contains bits used to control various features of the SLIC module.
Freescale Semiconductor
TXABRT
SLCIE
IMSG
Field
2
1
0
Reset
W
R
SLIC Control Register 2 (SLCC2)
Transmit Abort Message
0 Normal operation
1 Transmitter aborts current transmission at next byte boundary; TXABRT resets to 0 after the transmission is
SLIC Ignore Message Bit — IMSG cannot be cleared by a write of 0, but is cleared automatically by the SLIC
module after the next BREAK/SYNC symbol pair is validated. After it is set, IMSG will not keep data from being
written to the receive data buffer, which means that the buffers cannot be assumed to contain known valid
message data until the next receive buffer full interrupt. IMSG must not be used in BTM mode. The SLIC
automatically clears the IMSG bit when entering MCU STOP mode or MCU wait mode with SLCWCM bit set.
0 Normal operation1SLIC interrupts (except "No Bus Activity") are suppressed until the next message header
SLIC Interrupt Enable
0 SLIC interrupt sources are disabled
1 SLIC interrupt sources are enabled
successfully aborted TXABRT also resets to 0 upon detection of a bit error.
arrives
0
0
7
= Unimplemented or Reserved
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
Table 12-1. SLCC1 Field Descriptions (continued)
6
1
Figure 12-5. SLIC Control Register 2 (SLCC2)
RXFP
0
5
4
0
Description
SLCWCM
0
3
BTM
2
0
0
0
1
SLCE
0
0
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