MPC8536-RDK Freescale Semiconductor, MPC8536-RDK Datasheet - Page 81

• Manufacturer Part Number: MPC8536-RDK
• Description: BOARD REF COMEXPRESS MPC8536
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536-RDK

• Contents: CSB1880, CSB1801, Cables, Documentation, Enclosure, Power Supply with cord
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table
Number
1-1
1-2
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
3-1
3-2
3-3
3-4
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
4-10
4-11
4-12
4-13
4-14
4-15
4-16
4-17
4-18
4-19
4-20
4-21
Freescale Semiconductor
Supported SerDes 1 (PCI Express) Configurations ................................................................ 1-5
Supported eTSEC1 and eTSEC3 Configurations ................................................................... 1-5
Target Interface Codes ............................................................................................................ 2-1
Local Access Windows Example............................................................................................ 2-2
Format of ATMU Window Definitions................................................................................... 2-3
Local Access Register Memory Map...................................................................................... 2-5
LAIPBRR1 Field Descriptions ............................................................................................... 2-6
LAIPBRR2 Field Descriptions ............................................................................................... 2-6
LAWBARn Field Descriptions ............................................................................................... 2-7
LAWARn Field Descriptions .................................................................................................. 2-8
Overlapping Local Access Windows ...................................................................................... 2-8
Local Memory Configuration, Control, and Status Register Summary................................ 2-11
CCSR Block Base Address Map........................................................................................... 2-15
MPC8536E Signal Reference by Functional Block................................................................ 3-2
MPC8536E Alphabetical Signal Reference............................................................................ 3-9
MPC8536E Reset Configuration Signals.............................................................................. 3-16
Output Signal States During System Reset ........................................................................... 3-17
Signal Summary ...................................................................................................................... 4-1
System Control Signals—Detailed Signal Descriptions ......................................................... 4-2
Clock Signals—Detailed Signal Descriptions ........................................................................ 4-3
Local Configuration Control Register Map ............................................................................ 4-4
CCSRBAR Bit Settings .......................................................................................................... 4-5
ALTCBAR Bit Settings........................................................................................................... 4-6
ALTCAR Bit Settings ............................................................................................................. 4-6
BPTR Bit Settings ................................................................................................................... 4-8
CCB Clock PLL Ratio .......................................................................................................... 4-12
e500 Core Clock PLL Ratios ................................................................................................ 4-12
DDR Complex Clock PLL Ratios......................................................................................... 4-13
System Speed Configuration................................................................................................. 4-13
Core Speed Configuration..................................................................................................... 4-14
Boot ROM Location.............................................................................................................. 4-15
Host/Agent Configuration..................................................................................................... 4-16
SerDes1 I/O Port Selection ................................................................................................... 4-16
SerDes2 I/O Port Selection ................................................................................................... 4-17
CPU Boot Configuration....................................................................................................... 4-18
Boot Sequencer Configuration.............................................................................................. 4-18
DDR DRAM Type ................................................................................................................ 4-19
Serdes 2 Reference Clock Configuration.............................................................................. 4-19
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
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