HD6417020SX20IV Renesas Electronics America, HD6417020SX20IV Datasheet - Page 173

SH 1 CORE 32B MPU, 20MHZ/5V, 100

HD6417020SX20IV

Manufacturer Part Number
HD6417020SX20IV
Description
SH 1 CORE 32B MPU, 20MHZ/5V, 100
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6417020SX20IV

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
8.6.2
When the address/data multiplexed I/O space is accessed, the WAIT pin input signal is sampled
and a wait state inserted whenever a low level is detected, regardless of the setting of the WCR.
Figure 8.33 shows an example in which a WAIT signal causes a wait state of 1 state to be inserted.
8.6.3
The byte access control signals when the address/data multiplexed I/O space is being accessed are
of two types (WRH, WRL, A0, or WR, HBS, LBS), just as for byte access control of external
memory space access. These types can be selected using the BAS bit of the BCR. See section
8.4.3, Byte Access Control, for details.
Read
Write
Figure 8.33 Wait State Timing For Address/Data Multiplexed I/O Space Access
Wait State Control
Byte Access Control
WRH, WRL
AD15–AD0
AD15–AD0
A21–A0
WAIT
RD
CK
CS
AH
T1
Address
Address
T2
T3
(wait state)
Tw
Data (output)
Data (input)
T4
RENESAS 153

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