HD6417020SX20IV Renesas Electronics America, HD6417020SX20IV Datasheet - Page 262

SH 1 CORE 32B MPU, 20MHZ/5V, 100

HD6417020SX20IV

Manufacturer Part Number
HD6417020SX20IV
Description
SH 1 CORE 32B MPU, 20MHZ/5V, 100
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6417020SX20IV

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
10.4
10.4.1
The operation modes are described below.
Ordinary Operation: Each channel has a timer counter (TCNT) and general register (GR). The
TCNT is an upcounter and can also operate as a free-running counter, periodic counter or external
event counter. General registers A and B (GRA and GRB) can be used as output compare registers
or input capture registers.
Synchronized Operation: The TCNT of a channel set for synchronized operation does a
synchronized preset. When any TCNT of a channel operating in the synchronized mode is
rewritten, the TCNTs of other channels are simultaneously rewritten as well. The CCLR1 and
CCLR0 bits of the timer control register of multiple channels set for synchronous operation can be
set to clear the TCNTs simultaneously.
244 RENESAS
Description of Operation
Overview
CPU
CPU
Internal data bus
Internal data bus
Figure 10.13 TCR Access (TCR–CPU )
Figure 10.12 TCR Access (CPU–TCR)
interface
interface
Bus
Bus
TCR
TCR
Module
data bus
Module
data bus

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