HD6417020SX20IV Renesas Electronics America, HD6417020SX20IV Datasheet - Page 188

• Manufacturer Part Number: HD6417020SX20IV
• Description: SH 1 CORE 32B MPU, 20MHZ/5V, 100
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7020r

Specifications of HD6417020SX20IV

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

9.1
The SuperH microprocomputer chip includes a four-channel direct memory access controller
(DMAC). The DMAC can be used in place of the CPU to perform high speed transfers between
external devices that have DACK (transfer request acknowledge signal), external memory,
memory-mapped external devices, on-chip memory and on-chip peripheral modules (excluding
the DMAC itself). Using the DMAC reduces the burden on the CPU and increases overall
operating efficiency.
9.1.1
The DMAC has the following features.
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Four channels
Four Gbytes of address space on the architecture
Byte or word selectable data transfer unit
65536 transfers (maximum)
Single address mode transfers (channels 0 and 1): Either the transfer source or transfer
destination (peripheral device) is accessed by a DACK signal (selectable) while the other is
accessed by address. 1 transfer unit of data is transferred in each bus cycle.
Device combinations able to transfer:
Dual address mode transfer: (channels 0–3): Both the transfer source and transfer destination
are accessed by address. 1 transfer unit of data is transferred in 2 bus cycles.
Device combinations able to transfer:
Section 9 Direct Memory Access Controller (DMAC)
External devices with DACK and memory-mapped external devices (including external
External devices with DACK and memory-mapped external memories
Two external memories
External memory and memory-mapped external devices
Two memory-mapped devices
External memory and on-chip memory
Memory-mapped external devices and on-chip peripheral module (excluding the DMAC
External memory and on-chip memory
Memory-mapped external device and on-chip peripheral module (excluding the DMAC)
Two on-chip memories
On-chip memory and on-chip peripheral modules (excluding DMAC)
memories)
itself)
Overview
Features
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