HD6417020SX20IV Renesas Electronics America, HD6417020SX20IV Datasheet - Page 446

SH 1 CORE 32B MPU, 20MHZ/5V, 100

HD6417020SX20IV

Manufacturer Part Number
HD6417020SX20IV
Description
SH 1 CORE 32B MPU, 20MHZ/5V, 100
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6417020SX20IV

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
18.1
In the power-down mode, all CPU functions are halted. This lowers power consumption
dramatically.
18.1.1
The SH microprocessor has two power-down modes.
1. Sleep mode
2. Standby mode
The sleep mode and standby mode are entered from the program execution state according to the
transition conditions given in table 18.1. Table 18.1 also describes procedures for canceling each
mode and the states of the CPU and peripheral functions.
Table 18.1 Power-Down States
Mode
Sleep
mode
Standb
y mode
SBYCR: Standby control register
SBY: Standby bit
Notes: 1. Some of the registers of the on-chip peripheral modules are not initialized in the
2. The status of I/O ports in the standby mode are set by the port high-impedance bit (HIZ)
Entering
Procedure
Execute
SLEEP
instruction
with SBY
bit set to 0
in SBYCR
Execute
SLEEP
instruction
with SBY
bit set to 1
in SBYCR
Overview
Power-Down Modes
standby mode. For details, see table 18.3, Status of Registers in the Standby Mode in
section 18.4.1, Transition to the Standby Mode, or the descriptions of registers given
where the on-chip peripheral modules are covered.
of the SBYCR. See section 18.2, Standby Control Register (SBYCR) for details. The
status of pins other than the I/O ports are described in appendix B, Pin States.
Clock
Run
Halt
Section 18 Power-Down States
CPU
Halt
Halt
Peripheral
Functions
Run
Halt*
1
State
Held
CPU
Registers RAM
Held
Held
Held
I/O
Ports
Held
Held or
high-Z*
2
RENESAS 433
Canceling
Procedure
• Interrupt
• DMA
• Power-on
• Manual
• NMI
• Power-on
• Manual
address
error
reset
reset
reset
reset

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