HD6417020SX20IV Renesas Electronics America, HD6417020SX20IV Datasheet - Page 477

SH 1 CORE 32B MPU, 20MHZ/5V, 100

HD6417020SX20IV

Manufacturer Part Number
HD6417020SX20IV
Description
SH 1 CORE 32B MPU, 20MHZ/5V, 100
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6417020SX20IV

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Notes: 1.
Figure 19.12 (a) DRAM Bus Cycle (Short-Pitch, High-Speed Page Mode: Read)
WRH, WRL ,
AD15–AD0
WR (Read)
DPH, DPL
RD(Read)
2.
3.
4.
5.
A21–A0
DACK0
DACK1
(Read)
(Read)
For t
of t
It is not necessary to meet the t
met.
For t
It is not necessary to meet the t
met.
For t
It is not necessary to meet the t
met.
t
t
RAS
CAS
RDH
RDH
CK
cyc
is measured from A21—A0 or CAS, whichever is negated first.
is measured from A21—A0, RAS, or CAS, whichever is negated first.
CAC1
ACC1
RAC1
– t
, use t
, use t
, use t
AD
– t
T
p
ASC
cyc
cyc
cyc
t
RASD1
– 30 instead of t
– t
t
t
RAC1
AD
0.65 – 19 (for 35% duty) or t
1.5 – 20 instead of t
RDS
T
*
.
r
Row address
3
t
ACC1
t
RDD
t
AD
*
t
Column address
T
t
2
DACD1
CAC1
RDS
RDS
RDS
c
t
ASC
t
cyc
RDS
specification as long as the t
specification as long as the t
specification as long as the t
*
– t
1
t
RSD
t
t
DACD2
RDH
AD
Column address
t
t
cyc
ACP
CP
T
– t
c
*
4
RDS
1.5 – t
.
cyc
Column address
T
RASD1
c
0.5 – 19 (for 50% duty) instead
– t
Column address
RDS
T
c
.
CAC1
ACC1
RAC1
t
t
RDH
RASD2
specification is
specification is
specification is
RENESAS 465
*
5

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